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_PCA9554_ADDRESS=const(0x27) #TODO: this will probably change based on the device used. Not sure how to deal with this. Maybe remove the default and force the user to specify the address?
_PCA9555_ADDRESS=const(0x20) #TODO: this will probably change based on the device used. Not sure how to deal with this. Maybe remove the default and force the user to specify the address?
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# TODO: this will probably change based on the device used.
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# Not sure how to deal with this. Maybe remove the default and
# Internal helpers to simplify setting and getting a bit inside an integer.
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#TODO: Can I include these from another file?
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def_get_bit(val, bit):
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returnval& (1<<bit) >0
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def_enable_bit(val, bit):
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returnval| (1<<bit)
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def_clear_bit(val, bit):
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returnval&~(1<<bit)
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_PCAL9554_ADDRESS=const(0x27) #TODO: this will probably change based on the device used. Not sure how to deal with this. Maybe remove the default and force the user to specify the address?
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# TODO: Probably don't want this here.
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_PCAL9554_ADDRESS=const(0x27)
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_PCAL9554_OUTPUT_DRIVE_1=const(0x40)
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_PCAL9554_OUTPUT_DRIVE_2=const(0x41)
@@ -68,51 +65,80 @@ def _clear_bit(val, bit):
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_PCAL9554_IRQ_STATUS=const(0x46)
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_PCAL9554_OUTPUT_PORT_CONFIG=const(0x4F)
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classPCAL9554(PCA9554):
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"""Supports PCAL9554 instance on specified I2C bus and optionally
_enable_bit(0x00, i2c_expander.Capability.DRIVE_MODE) #TODO: This device does not really have a capability to set drive mode the way digitalio is expecting. I should probably not se this here.
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super().__init__(
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i2c, address, False
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) # This initializes the PCA9554 compatible registers.
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self._capability= (
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_enable_bit(0x00, Capability.PULL_UP)
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|_enable_bit(0x00, Capability.PULL_DOWN)
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|_enable_bit(0x00, Capability.INVERT_POL)
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|_enable_bit(0x00, Capability.DRIVE_MODE)
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) # TODO: This device does not really have a capability to set drive mode the way
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# digitalio is expecting. I should probably not set this here.
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ifreset:
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self.reset_to_defaults()
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defreset_to_defaults(self):
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"""Reset all registers to their default state. This is also
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done with a power cycle, but it can be called by software here.
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:return: Nothing.
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"""
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# TODO: Should I make some sort of 'register' class to handle
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# memory addresses and default states?
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# Input port and interrupt status registers are read only.
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self.gpio=0xFF
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self.ipol=0x0000
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self.iodir=0xFF
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# self.out0_drive = 0xFFFF
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# self.out1_drive = 0xFFFF
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# self.input_latch = 0x0000
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# self.pupd_en = 0xFFFF
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# self.pupd_sel = 0xFFFF
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# self.irq_mask = 0xFFFF
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# self.out_port_config = 0x00
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@property
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defpupd_en(self):
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"""reads the pull up/down status
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"""
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"""reads the pull up/down status"""
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returnself._read_u8(_PCAL9554_PUPD_EN)
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@pupd_en.setter
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defpupd_en(self, val):
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self._write_u8(_PCAL9554_PUPD_EN, val)
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@property
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defpupd_sel(self):
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"""reads the pull up/down status
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"""
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"""reads the pull up/down status"""
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returnself._read_u8(_PCAL9554_PUPD_SEL)
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@pupd_sel.setter
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defpupd_sel(self, val):
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self._write_u8(_PCAL9554_PUPD_SEL, val)
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#Enable interrupt on a pin. Interrupts are triggered by any state change of the pin.
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#Enable interrupt on a pin. Interrupts are triggered by any state change of the pin.
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