LPSPI: embedded-hal 1.0 rework

Cargo.toml

@@ -1,14 +1,17 @@
 [package]
 name = "imxrt-hal"
-authors = ["Tom Burdick <[email protected]>", "Ian McIntyre <[email protected]>"]
+authors = [
+    "Tom Burdick <[email protected]>",
+    "Ian McIntyre <[email protected]>",
+]
 description = """
 Hardware abstraction layer for NXP i.MX RT microcontrollers.
 """
 readme = "README.md"
-repository = { workspace  = true }
-keywords = { workspace  = true }
-categories = { workspace  = true }
-license = { workspace  = true }
+repository = { workspace = true }
+keywords = { workspace = true }
+categories = { workspace = true }
+license = { workspace = true }
 edition = { workspace = true }
 version = "0.5.3"
 
@@ -33,11 +36,26 @@ version = "1"
 package = "embedded-hal"
 version = "0.2"
 
+[dependencies.eh1]
+package = "embedded-hal"
+version = "1.0.0-rc.1"
+
+[dependencies.eh1-async]
+package = "embedded-hal-async"
+version = "1.0.0-rc.1"
+optional = true
+
 [dependencies.rand_core]
-version = "0.5"
+version = "0.6"
 default-features = false
 optional = true
 
+[dependencies.cortex-m]
+version = "0.7"
+
+[dependencies.cassette]
+version = "0.2.3"
+
 #######################
 # imxrt-rs dependencies
 #######################
@@ -70,6 +88,7 @@ imxrt1020 = ["imxrt-iomuxc/imxrt1020"]
 imxrt1060 = ["imxrt-iomuxc/imxrt1060"]
 imxrt1064 = ["imxrt-iomuxc/imxrt1060"]
 imxrt1170 = ["imxrt-iomuxc/imxrt1170"]
+async = ["dep:eh1-async"]
 
 ################
 # Extra features
@@ -80,16 +99,17 @@ imxrt1170 = ["imxrt-iomuxc/imxrt1170"]
 eh02-unproven = []
 
 [workspace]
-members = [
-    "board",
-    "logging",
-]
+members = ["board", "logging"]
 
 [workspace.dependencies]
 imxrt-dma = "0.1"
 imxrt-iomuxc = "0.2.1"
 imxrt-hal = { version = "0.5", path = "." }
-imxrt-log = { path = "logging", default-features = false, features = ["log", "lpuart", "usbd"] }
+imxrt-log = { path = "logging", default-features = false, features = [
+    "log",
+    "lpuart",
+    "usbd",
+] }
 imxrt-ral = "0.5"
 imxrt-rt = "0.1"
 imxrt-usbd = "0.2"
@@ -124,16 +144,20 @@ codegen-units = 256
 ######################################
 
 [dev-dependencies]
-cortex-m = "0.7"
 imxrt-rt = { workspace = true }
-menu = "0.3.2"
-cortex-m-rtic = "1.0"
+menu = "0.4.0"
+rtic = { version = "2.0.1", features = ["thumbv7-backend"] }
+rtic-monotonics = { version = "1.2.0", features = [
+    "cortex-m-systick",
+    "embedded-hal-async",
+] }
 log = "0.4"
 defmt = "0.3"
 pin-utils = "0.1"
 usb-device = { version = "0.2", features = ["test-class-high-speed"] }
 usbd-serial = "0.1"
 usbd-hid = "0.6"
+embedded-hal-bus = { version = "0.1.0-rc.1", features = ["async"] }
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))'.dev-dependencies]
 board = { path = "board" }
@@ -148,7 +172,7 @@ required-features = ["board/spi"]
 
 [[example]]
 name = "rtic_spi"
-required-features = ["board/spi"]
+#required-features = ["board/spi"]
 
 [[example]]
 name = "hal_logging"

board/src/teensy4.rs

@@ -49,16 +49,27 @@ pub type SpiPins = hal::lpspi::Pins<
     iomuxc::gpio_b0::GPIO_B0_02, // SDO, P11
     iomuxc::gpio_b0::GPIO_B0_01, // SDI, P12
     iomuxc::gpio_b0::GPIO_B0_03, // SCK, P13
-    iomuxc::gpio_b0::GPIO_B0_00, // PCS0, P10
 >;
 
 #[cfg(not(feature = "spi"))]
 /// Activate the `"spi"` feature to configure the SPI peripheral.
-pub type Spi = ();
+mod lpspi_types {
+    pub type SpiBus = ();
+    pub type SpiCsPin = ();
+    pub type SpiInterruptHandler = ();
+}
 
 #[cfg(feature = "spi")]
 /// SPI peripheral.
-pub type Spi = hal::lpspi::Lpspi<SpiPins, 4>;
+mod lpspi_types {
+
+    use super::*;
+    pub type SpiBus = hal::lpspi::Lpspi<'static, 4>;
+    pub type SpiCsPin = hal::gpio::Output<iomuxc::gpio_b0::GPIO_B0_00>;
+    pub type SpiInterruptHandler = hal::lpspi::LpspiInterruptHandler<'static, 4>;
+}
+
+pub use lpspi_types::*;
 
 pub type I2cPins = hal::lpi2c::Pins<
     iomuxc::gpio_ad_b1::GPIO_AD_B1_07, // SCL, P16
@@ -110,7 +121,7 @@ pub struct Specifics {
     pub button: Button,
     pub ports: GpioPorts,
     pub console: Console,
-    pub spi: Spi,
+    pub spi: (SpiBus, SpiCsPin),
     pub i2c: I2c,
     pub pwm: Pwm,
     pub trng: hal::trng::Trng,
@@ -153,17 +164,25 @@ impl Specifics {
                 sdo: iomuxc.gpio_b0.p02,
                 sdi: iomuxc.gpio_b0.p01,
                 sck: iomuxc.gpio_b0.p03,
-                pcs0: iomuxc.gpio_b0.p00,
             };
-            let mut spi = Spi::new(lpspi4, pins);
-            spi.disabled(|spi| {
-                spi.set_clock_hz(super::LPSPI_CLK_FREQUENCY, super::SPI_BAUD_RATE_FREQUENCY);
+            let cs_pin = gpio2.output(iomuxc.gpio_b0.p00);
+
+            static mut SPI_DATA: Option<super::hal::lpspi::LpspiData<4>> = None;
+            let mut spi = SpiBus::new(
+                lpspi4,
+                pins,
+                unsafe { &mut SPI_DATA },
+                super::LPSPI_CLK_FREQUENCY,
+            );
+            spi.disabled(|bus| {
+                bus.set_clock_hz(super::SPI_BAUD_RATE_FREQUENCY);
             });
-            spi
+
+            (spi, cs_pin)
         };
         #[cfg(not(feature = "spi"))]
         #[allow(clippy::let_unit_value)]
-        let spi = ();
+        let spi = ((), ());
 
         let lpi2c3 = unsafe { ral::lpi2c::LPI2C3::instance() };
         let i2c = I2c::new(
@@ -218,7 +237,7 @@ pub(crate) const CLOCK_GATES: &[clock_gate::Locator] = &[
     clock_gate::gpio::<2>(),
     clock_gate::lpuart::<{ Console::N }>(),
     #[cfg(feature = "spi")]
-    clock_gate::lpspi::<{ Spi::N }>(),
+    clock_gate::lpspi::<{ SpiBus::N }>(),
     clock_gate::lpi2c::<{ I2c::N }>(),
     clock_gate::flexpwm::<{ pwm::Peripheral::N }>(),
 ];

examples/rtic_spi.rs

@@ -4,64 +4,108 @@
 //! schedule transfers, and to receive data. You can observe the
 //! I/O with a scope / logic analyzer. The SPI CLK runs at 1MHz,
 //! and the frame size is 64 bits.
+//!
+//! TODO: update description
 
 #![no_std]
 #![no_main]
+// Required for RTIC 2 (for now)
+#![feature(type_alias_impl_trait)]
 
-#[rtic::app(device = board, peripherals = false)]
+#[rtic::app(device = board, peripherals = false, dispatchers = [BOARD_SWTASK0])]
 mod app {
 
-    use hal::lpspi::{Direction, Interrupts, Status, Transaction};
+    use embedded_hal_bus::spi::ExclusiveDevice;
     use imxrt_hal as hal;
 
+    use eh1::spi::Operation;
+    use eh1::spi::SpiDevice;
+    use hal::lpspi::LpspiDma;
+    use rtic_monotonics::systick::*;
+
+    use board::{SpiBus, SpiCsPin, SpiInterruptHandler};
+
     #[local]
     struct Local {
-        spi: board::Spi,
+        spi_device: ExclusiveDevice<SpiBus, SpiCsPin, Systick>,
+        spi_interrupt_handler: SpiInterruptHandler,
     }
 
     #[shared]
     struct Shared {}
 
-    #[init]
-    fn init(_: init::Context) -> (Shared, Local, init::Monotonics) {
-        let (_, board::Specifics { mut spi, .. }) = board::new();
-        spi.disabled(|spi| {
-            // Trigger when the TX FIFO is empty.
-            spi.set_watermark(Direction::Tx, 0);
-            // Wait to receive at least 2 u32s.
-            spi.set_watermark(Direction::Rx, 1);
-        });
-        // Starts the I/O as soon as we're done initializing, since
-        // the TX FIFO is empty.
-        spi.set_interrupts(Interrupts::TRANSMIT_DATA);
-        (Shared {}, Local { spi }, init::Monotonics())
-    }
+    #[init(local = [
+        spi_systick: Option<Systick> = None,
+    ])]
+    fn init(cx: init::Context) -> (Shared, Local) {
+        let (
+            board::Common { mut dma, .. },
+            board::Specifics {
+                spi: (mut spi_bus, spi_cs_pin),
+                ..
+            },
+        ) = board::new();
 
-    #[task(binds = BOARD_SPI, local = [spi])]
-    fn spi_interrupt(cx: spi_interrupt::Context) {
-        let spi_interrupt::LocalResources { spi } = cx.local;
+        // Init monotonic
+        let systick_token = rtic_monotonics::create_systick_token!();
+        Systick::start(
+            cx.core.SYST,
+            600_000_000, /* TODO: fix */
+            systick_token,
+        );
+
+        // Init DMA
+        let mut chan_a = dma[board::BOARD_DMA_A_INDEX].take().unwrap();
+        chan_a.set_disable_on_completion(true);
 
-        let status = spi.status();
-        spi.clear_status(Status::TRANSMIT_DATA | Status::RECEIVE_DATA);
+        let mut chan_b = dma[board::BOARD_DMA_B_INDEX].take().unwrap();
+        chan_b.set_disable_on_completion(true);
 
-        if status.intersects(Status::TRANSMIT_DATA) {
-            // This write clears TRANSMIT_DATA.
-            spi.set_interrupts(Interrupts::RECEIVE_DATA);
+        // Configure SPI
+        spi_bus.set_dma(LpspiDma::Full(chan_a, chan_b));
+        let spi_interrupt_handler = spi_bus.enable_interrupts();
 
-            // Sending two u32s. Frame size is represented by bits.
-            let transaction = Transaction::new(2 * 8 * core::mem::size_of::<u32>() as u16)
-                .expect("Transaction frame size is within bounds");
-            spi.enqueue_transaction(&transaction);
+        // Create SPI device
+        let spi_device = ExclusiveDevice::new(spi_bus, spi_cs_pin, Systick);
 
-            spi.enqueue_data(0xDEADBEEF);
-            spi.enqueue_data(!0xDEADBEEF);
-        } else if status.intersects(Status::RECEIVE_DATA) {
-            // This write clears RECEIVE_DATA.
-            spi.set_interrupts(Interrupts::TRANSMIT_DATA);
+        demo::spawn().unwrap();
 
-            assert!(spi.fifo_status().rxcount == 2);
+        (
+            Shared {},
+            Local {
+                spi_device,
+                spi_interrupt_handler,
+            },
+        )
+    }
 
-            while let Some(_) = spi.read_data() {}
+    #[task(priority = 1, local = [spi_device])]
+    async fn demo(cx: demo::Context) {
+        let demo::LocalResources { spi_device, .. } = cx.local;
+
+        loop {
+            Systick::delay(1000.millis()).await;
+
+            // To demonstrate normal operation
+            spi_device
+                .transaction(&mut [
+                    Operation::DelayUs(100),
+                    Operation::Write(&[12345u16]),
+                    Operation::DelayUs(10),
+                    Operation::Write(&[420, 69, 42]),
+                    Operation::Write(&[0xFFFF]),
+                    Operation::DelayUs(50),
+                ])
+                .unwrap();
+
+            // To demonstrate larger, DMA based transfers
+            let mut buf = [0xf5u32; 512];
+            spi_device.transfer_in_place(&mut buf).unwrap();
         }
     }
+
+    #[task(priority = 2, binds = BOARD_SPI, local = [spi_interrupt_handler])]
+    fn spi_interrupt(cx: spi_interrupt::Context) {
+        cx.local.spi_interrupt_handler.on_interrupt();
+    }
 }

rust-toolchain.toml

@@ -0,0 +1,4 @@
+[toolchain]
+channel = "nightly"
+# components = ["rustfmt", "llvm-tools"]
+targets = ["thumbv7em-none-eabihf"]