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io-sim-por: renamed lubVClock as leastUpperBoundVClock
1 parent 8c9b023 commit 4206f34

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-17
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+18
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io-sim/src/Control/Monad/IOSimPOR/Internal.hs

Lines changed: 18 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -115,8 +115,9 @@ bottomVClock = VectorClock Map.empty
115115
insertVClock :: ThreadId -> Int -> VectorClock -> VectorClock
116116
insertVClock tid !step (VectorClock m) = VectorClock (Map.insert tid step m)
117117

118-
lubVClock :: VectorClock -> VectorClock -> VectorClock
119-
lubVClock (VectorClock m) (VectorClock m') = VectorClock (Map.unionWith max m m')
118+
leastUpperBoundVClock :: VectorClock -> VectorClock -> VectorClock
119+
leastUpperBoundVClock (VectorClock m) (VectorClock m') =
120+
VectorClock (Map.unionWith max m m')
120121

121122
-- hbfVClock :: VectorClock -> VectorClock -> Bool
122123
-- hbfVClock (VectorClock m) (VectorClock m') = Map.isSubmapOfBy (<=) m m'
@@ -480,8 +481,8 @@ schedule thread@Thread{
480481
StmTxCommitted x read written nextVid' -> do
481482
(wakeup, wokeby) <- threadsUnblockedByWrites written
482483
mapM_ (\(SomeTVar tvar) -> unblockAllThreadsFromTVar tvar) written
483-
vClockRead <- lubTVarVClocks read
484-
let vClock' = vClock `lubVClock` vClockRead
484+
vClockRead <- leastUpperBoundTVarVClocks read
485+
let vClock' = vClock `leastUpperBoundVClock` vClockRead
485486
effect' = effect
486487
<> readEffects read
487488
<> writeEffects written
@@ -491,9 +492,9 @@ schedule thread@Thread{
491492
threadEffect = effect' }
492493
(unblocked,
493494
simstate') = unblockThreads vClock' wakeup simstate
494-
sequence_ [ modifySTRef (tvarVClock r) (lubVClock vClock') | SomeTVar r <- written ]
495+
sequence_ [ modifySTRef (tvarVClock r) (leastUpperBoundVClock vClock') | SomeTVar r <- written ]
495496
vids <- traverse (\(SomeTVar tvar) -> labelledTVarId tvar) written
496-
-- We deschedule a thread after a transaction... another may have woken up.
497+
-- We deschedule a thread after a transaction... another may have woken up.
497498
trace <- deschedule Yield thread' simstate' { nextVid = nextVid' }
498499
return $
499500
SimTrace time tid tlbl (EventTxCommitted vids [nextVid..pred nextVid']) $
@@ -506,20 +507,20 @@ schedule thread@Thread{
506507

507508
StmTxAborted read e -> do
508509
-- schedule this thread to immediately raise the exception
509-
vClockRead <- lubTVarVClocks read
510+
vClockRead <- leastUpperBoundTVarVClocks read
510511
let effect' = effect <> readEffects read
511512
thread' = thread { threadControl = ThreadControl (Throw e) ctl,
512-
threadVClock = vClock `lubVClock` vClockRead,
513+
threadVClock = vClock `leastUpperBoundVClock` vClockRead,
513514
threadEffect = effect' }
514515
trace <- schedule thread' simstate
515516
return $ SimTrace time tid tlbl EventTxAborted trace
516517

517518
StmTxBlocked read -> do
518519
mapM_ (\(SomeTVar tvar) -> blockThreadOnTVar tid tvar) read
519520
vids <- traverse (\(SomeTVar tvar) -> labelledTVarId tvar) read
520-
vClockRead <- lubTVarVClocks read
521+
vClockRead <- leastUpperBoundTVarVClocks read
521522
let effect' = effect <> readEffects read
522-
thread' = thread { threadVClock = vClock `lubVClock` vClockRead,
523+
thread' = thread { threadVClock = vClock `leastUpperBoundVClock` vClockRead,
523524
threadEffect = effect' }
524525
trace <- deschedule Blocked thread' simstate
525526
return $ SimTrace time tid tlbl (EventTxBlocked vids) trace
@@ -568,7 +569,7 @@ schedule thread@Thread{
568569
ThrowTo e tid' k -> do
569570
let thread' = thread { threadControl = ThreadControl k ctl,
570571
threadEffect = effect <> throwToEffect tid' <> wakeUpEffect,
571-
threadVClock = vClock `lubVClock` vClockTgt }
572+
threadVClock = vClock `leastUpperBoundVClock` vClockTgt }
572573
(vClockTgt,
573574
wakeUpEffect,
574575
willBlock) = (threadVClock t,
@@ -601,7 +602,7 @@ schedule thread@Thread{
601602
t { threadControl = ThreadControl (Throw e) ctl'
602603
, threadBlocked = False
603604
, threadMasking = MaskedInterruptible
604-
, threadVClock = vClock' `lubVClock` vClock }
605+
, threadVClock = vClock' `leastUpperBoundVClock` vClock }
605606
simstate'@SimState { threads = threads' }
606607
= snd (unblockThreads vClock [tid'] simstate)
607608
threads'' = Map.adjust adjustTarget tid' threads'
@@ -657,7 +658,7 @@ deschedule Interruptable thread@Thread {
657658
let thread' = thread { threadControl = ThreadControl (Throw e) ctl
658659
, threadMasking = MaskedInterruptible
659660
, threadThrowTo = etids
660-
, threadVClock = vClock `lubVClock` vClock' }
661+
, threadVClock = vClock `leastUpperBoundVClock` vClock' }
661662
(unblocked,
662663
simstate') = unblockThreads vClock [l_labelled tid'] simstate
663664
-- the thread is stepped when we Yield
@@ -828,7 +829,7 @@ unblockThreads vClock wakeup simstate@SimState {runqueue, threads} =
828829
threads' = List.foldl'
829830
(flip (Map.adjust
830831
(\t -> t { threadBlocked = False,
831-
threadVClock = vClock `lubVClock` threadVClock t })))
832+
threadVClock = vClock `leastUpperBoundVClock` threadVClock t })))
832833
threads unblocked
833834

834835

@@ -1138,9 +1139,9 @@ commitTVar TVar{tvarUndo} = do
11381139
readTVarUndos :: TVar s a -> ST s [a]
11391140
readTVarUndos TVar{tvarUndo} = readSTRef tvarUndo
11401141

1141-
lubTVarVClocks :: [SomeTVar s] -> ST s VectorClock
1142-
lubTVarVClocks tvars =
1143-
foldr lubVClock bottomVClock <$>
1142+
leastUpperBoundTVarVClocks :: [SomeTVar s] -> ST s VectorClock
1143+
leastUpperBoundTVarVClocks tvars =
1144+
foldr leastUpperBoundVClock bottomVClock <$>
11441145
sequence [readSTRef (tvarVClock r) | SomeTVar r <- tvars]
11451146

11461147
--

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