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io-sim-por: written & read tvars are swapped
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io-sim/src/Control/Monad/IOSimPOR/Internal.hs

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@@ -513,7 +513,7 @@ schedule thread@Thread{
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Atomically a k -> execAtomically time tid tlbl nextVid (runSTM a) $ \res ->
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case res of
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StmTxCommitted x read written created tvarTraces nextVid' -> do
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StmTxCommitted x written read created tvarTraces nextVid' -> do
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(wakeup, wokeby) <- threadsUnblockedByWrites written
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mapM_ (\(SomeTVar tvar) -> unblockAllThreadsFromTVar tvar) written
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vClockRead <- leastUpperBoundTVarVClocks read

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