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ChuckMesden
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Updated the LCD SPI
Now that I know a bit more about how SPI is working on the STM32F4 I removed the egregious hack and replaced it with some cleaner code for driving the LCD. On the positive side it gets a faster update rate on the screen.
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  • examples/stm32/f4/stm32f429i-discovery/lcd-serial

1 file changed

+10
-33
lines changed

examples/stm32/f4/stm32f429i-discovery/lcd-serial/lcd-spi.c

Lines changed: 10 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -115,29 +115,15 @@ static void lcd_command(uint8_t cmd, int delay, int n_args,
115115
*/
116116
static void
117117
lcd_command(uint8_t cmd, int delay, int n_args, const uint8_t *args) {
118-
uint32_t timeout;
119118
int i;
120119

121120
gpio_clear(GPIOC, GPIO2); // Select the LCD
122-
rx_pend++;
123-
spi_send(SPI5, cmd);
124-
/* We need to wait until it is sent, if we turn on the Data
125-
* line too soon, it ends up confusing the display to thinking
126-
* its a data transfer, as it samples the D/CX line on the last
127-
* bit sent.
128-
*/
129-
for (timeout = 0; (timeout < 1000) && (rx_pend); timeout++);
130-
rx_pend = 0; // sometimes, at 10Mhz we miss this
121+
(void) spi_xfer(LCD_SPI, cmd);
131122
if (n_args) {
132123
gpio_set(GPIOD, GPIO13); // Set the D/CX pin
133124
for (i = 0; i < n_args; i++) {
134-
rx_pend++;
135-
spi_send(SPI5, *(args+i));
125+
(void) spi_xfer(LCD_SPI, *(args+i));
136126
}
137-
/* This wait so that we don't pull CS too soon after
138-
* sending the last byte of data.
139-
*/
140-
for (timeout = 0; (timeout < 1000) && (rx_pend); timeout++);
141127
}
142128
gpio_set(GPIOC, GPIO2); // Turn off chip select
143129
gpio_clear(GPIOD, GPIO13); // always reset D/CX
@@ -341,7 +327,6 @@ void lcd_show_frame(void) {
341327
*/
342328
void
343329
lcd_spi_init(void) {
344-
uint32_t tmp;
345330

346331
/*
347332
* Set up the GPIO lines for the SPI port and
@@ -360,24 +345,16 @@ lcd_spi_init(void) {
360345

361346
rx_pend = 0;
362347
/* Implement state management hack */
363-
nvic_enable_irq(NVIC_SPI5_IRQ);
348+
// nvic_enable_irq(NVIC_SPI5_IRQ);
364349

365350
rcc_periph_clock_enable(RCC_SPI5);
366-
/* This should configure SPI5 as we need it configured */
367-
tmp = SPI_SR(LCD_SPI);
368-
SPI_CR2(LCD_SPI) |= (SPI_CR2_SSOE | SPI_CR2_RXNEIE);
369-
370-
/* device clocks on the rising edge of SCK with MSB first */
371-
tmp = SPI_CR1_BAUDRATE_FPCLK_DIV_4 | // 10.25Mhz SPI Clock (42M/4)
372-
SPI_CR1_MSTR | // Master Mode
373-
SPI_CR1_BIDIOE | // Write Only
374-
SPI_CR1_SPE; // Enable SPI
375-
376-
SPI_CR1(LCD_SPI) = tmp; // Do it.
377-
if (SPI_SR(LCD_SPI) & SPI_SR_MODF) {
378-
SPI_CR1(LCD_SPI) = tmp; // Re-writing will reset MODF
379-
console_puts("Initial mode fault.\n");
380-
}
351+
spi_init_master(LCD_SPI, SPI_CR1_BAUDRATE_FPCLK_DIV_4,
352+
SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
353+
SPI_CR1_CPHA_CLK_TRANSITION_1,
354+
SPI_CR1_DFF_8BIT,
355+
SPI_CR1_MSBFIRST);
356+
spi_enable_ss_output(LCD_SPI);
357+
spi_enable(LCD_SPI);
381358

382359
/* Set up the display */
383360
console_puts("Initialize the display.\n");

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