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[stm32f4-discovery] Added timer example for the stm32f4 discovery board.
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##
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## This file is part of the libopencm3 project.
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##
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## Copyright (C) 2009 Uwe Hermann <[email protected]>
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##
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## This library is free software: you can redistribute it and/or modify
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## it under the terms of the GNU Lesser General Public License as published by
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## the Free Software Foundation, either version 3 of the License, or
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## (at your option) any later version.
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##
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## This library is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU Lesser General Public License for more details.
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##
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## You should have received a copy of the GNU Lesser General Public License
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## along with this library. If not, see <http://www.gnu.org/licenses/>.
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##
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BINARY = timer
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LDSCRIPT = ../stm32f4-discovery.ld
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include ../../Makefile.include
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# README
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This example demonstrates the use of timers to trigger an interrupt. This
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example will toggle two LEDs spelling out the following morse code:
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SOS -> ...---...
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Where dots are .1s, dashes .2s, gaps .05s and the word pause .5s.
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It's intended for the ST STM32F4DISCOVERY eval board. It should blink
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the LEDs on the board.
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## Board connections
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*none required*
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2015 Piotr Esden-Tempski <[email protected]>
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* Copyright (C) 2015 Jack Ziesing <[email protected]>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/exti.h>
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uint16_t frequency_sequence[18] = {
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1000,
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500,
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1000,
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500,
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1000,
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500,
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2000,
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500,
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2000,
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500,
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2000,
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500,
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1000,
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500,
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1000,
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500,
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1000,
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5000,
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};
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uint16_t frequency_sel = 0;
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uint16_t compare_time;
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uint16_t new_time;
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uint16_t frequency;
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int debug = 0;
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static void clock_setup(void)
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{
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rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_168MHZ]);
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}
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static void gpio_setup(void)
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{
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/* Enable GPIOC clock. */
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rcc_periph_clock_enable(RCC_GPIOD);
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/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
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gpio_mode_setup(GPIOD, GPIO_MODE_OUTPUT,
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GPIO_PUPD_NONE, GPIO12 | GPIO13);
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gpio_set(GPIOD, GPIO12);
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gpio_clear(GPIOD, GPIO13);
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}
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static void tim_setup(void)
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{
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/* Enable TIM2 clock. */
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rcc_periph_clock_enable(RCC_TIM2);
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/* Enable TIM2 interrupt. */
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nvic_enable_irq(NVIC_TIM2_IRQ);
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/* Reset TIM2 peripheral. */
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timer_reset(TIM2);
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/* Timer global mode:
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* - No divider
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* - Alignment edge
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* - Direction up
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*/
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timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT,
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TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
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/* Reset prescaler value.
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* Running the clock at 5kHz.
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*/
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/*
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* On STM32F4 the timers are not running directly from pure APB1 or
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* APB2 clock busses. The APB1 and APB2 clocks used for timers might
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* be the double of the APB1 and APB2 clocks. This depends on the
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* setting in DCKCFGR register. By default the behaviour is the
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* following: If the Prescaler APBx is greater than 1 the derived timer
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* APBx clocks will be double of the original APBx frequencies. Only if
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* the APBx prescaler is set to 1 the derived timer APBx will equal the
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* original APBx frequencies.
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*
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* In our case here the APB1 is devided by 4 system frequency and APB2
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* divided by 2. This means APB1 timer will be 2 x APB1 and APB2 will
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* be 2 x APB2. So when we try to calculate the prescaler value we have
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* to use rcc_apb1_freqency * 2!!!
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*
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* For additional information see reference manual for the stm32f4
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* familiy of chips. Page 204 and 213
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*/
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timer_set_prescaler(TIM2, ((rcc_apb1_frequency * 2) / 10000));
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/* Enable preload. */
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timer_disable_preload(TIM2);
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/* Continous mode. */
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timer_continuous_mode(TIM2);
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/* Period (36kHz). */
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timer_set_period(TIM2, 65535);
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/* Disable outputs. */
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timer_disable_oc_output(TIM2, TIM_OC1);
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timer_disable_oc_output(TIM2, TIM_OC2);
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timer_disable_oc_output(TIM2, TIM_OC3);
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timer_disable_oc_output(TIM2, TIM_OC4);
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/* -- OC1 configuration -- */
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/* Configure global mode of line 1. */
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timer_disable_oc_clear(TIM2, TIM_OC1);
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timer_disable_oc_preload(TIM2, TIM_OC1);
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timer_set_oc_slow_mode(TIM2, TIM_OC1);
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timer_set_oc_mode(TIM2, TIM_OC1, TIM_OCM_FROZEN);
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/* Set the capture compare value for OC1. */
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timer_set_oc_value(TIM2, TIM_OC1, 1000);
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/* ---- */
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/* ARR reload enable. */
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timer_disable_preload(TIM2);
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/* Counter enable. */
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timer_enable_counter(TIM2);
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/* Enable commutation interrupt. */
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timer_enable_irq(TIM2, TIM_DIER_CC1IE);
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}
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void tim2_isr(void)
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{
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if (timer_get_flag(TIM2, TIM_SR_CC1IF)) {
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/* Clear compare interrupt flag. */
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timer_clear_flag(TIM2, TIM_SR_CC1IF);
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/*
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* Get current timer value to calculate next
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* compare register value.
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*/
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compare_time = timer_get_counter(TIM2);
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/* Calculate and set the next compare value. */
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frequency = frequency_sequence[frequency_sel++];
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new_time = compare_time + frequency;
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timer_set_oc_value(TIM2, TIM_OC1, new_time);
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if (frequency_sel == 18)
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frequency_sel = 0;
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/* Toggle LED to indicate compare event. */
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gpio_toggle(GPIOD, GPIO12);
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gpio_toggle(GPIOD, GPIO13);
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}
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}
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int main(void)
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{
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clock_setup();
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gpio_setup();
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tim_setup();
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while (1)
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__asm("nop");
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return 0;
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}

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