@@ -226,29 +226,29 @@ struct irq_data {
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*/
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enum {
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IRQD_TRIGGER_MASK = 0xf ,
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- IRQD_SETAFFINITY_PENDING = ( 1 << 8 ),
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- IRQD_ACTIVATED = ( 1 << 9 ),
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- IRQD_NO_BALANCING = ( 1 << 10 ),
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- IRQD_PER_CPU = ( 1 << 11 ),
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- IRQD_AFFINITY_SET = ( 1 << 12 ),
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- IRQD_LEVEL = ( 1 << 13 ),
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- IRQD_WAKEUP_STATE = ( 1 << 14 ),
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- IRQD_MOVE_PCNTXT = ( 1 << 15 ),
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- IRQD_IRQ_DISABLED = ( 1 << 16 ),
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- IRQD_IRQ_MASKED = ( 1 << 17 ),
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- IRQD_IRQ_INPROGRESS = ( 1 << 18 ),
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- IRQD_WAKEUP_ARMED = ( 1 << 19 ),
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- IRQD_FORWARDED_TO_VCPU = ( 1 << 20 ),
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- IRQD_AFFINITY_MANAGED = ( 1 << 21 ),
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- IRQD_IRQ_STARTED = ( 1 << 22 ),
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- IRQD_MANAGED_SHUTDOWN = ( 1 << 23 ),
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- IRQD_SINGLE_TARGET = ( 1 << 24 ),
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- IRQD_DEFAULT_TRIGGER_SET = ( 1 << 25 ),
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- IRQD_CAN_RESERVE = ( 1 << 26 ),
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- IRQD_MSI_NOMASK_QUIRK = ( 1 << 27 ),
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- IRQD_HANDLE_ENFORCE_IRQCTX = ( 1 << 28 ),
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- IRQD_AFFINITY_ON_ACTIVATE = ( 1 << 29 ),
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- IRQD_IRQ_ENABLED_ON_SUSPEND = ( 1 << 30 ),
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+ IRQD_SETAFFINITY_PENDING = BIT ( 8 ),
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+ IRQD_ACTIVATED = BIT ( 9 ),
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+ IRQD_NO_BALANCING = BIT ( 10 ),
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+ IRQD_PER_CPU = BIT ( 11 ),
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+ IRQD_AFFINITY_SET = BIT ( 12 ),
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+ IRQD_LEVEL = BIT ( 13 ),
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+ IRQD_WAKEUP_STATE = BIT ( 14 ),
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+ IRQD_MOVE_PCNTXT = BIT ( 15 ),
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+ IRQD_IRQ_DISABLED = BIT ( 16 ),
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+ IRQD_IRQ_MASKED = BIT ( 17 ),
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+ IRQD_IRQ_INPROGRESS = BIT ( 18 ),
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+ IRQD_WAKEUP_ARMED = BIT ( 19 ),
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+ IRQD_FORWARDED_TO_VCPU = BIT ( 20 ),
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+ IRQD_AFFINITY_MANAGED = BIT ( 21 ),
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+ IRQD_IRQ_STARTED = BIT ( 22 ),
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+ IRQD_MANAGED_SHUTDOWN = BIT ( 23 ),
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+ IRQD_SINGLE_TARGET = BIT ( 24 ),
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+ IRQD_DEFAULT_TRIGGER_SET = BIT ( 25 ),
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+ IRQD_CAN_RESERVE = BIT ( 26 ),
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+ IRQD_MSI_NOMASK_QUIRK = BIT ( 27 ),
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+ IRQD_HANDLE_ENFORCE_IRQCTX = BIT ( 28 ),
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+ IRQD_AFFINITY_ON_ACTIVATE = BIT ( 29 ),
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+ IRQD_IRQ_ENABLED_ON_SUSPEND = BIT ( 30 ),
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};
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#define __irqd_to_state (d ) ACCESS_PRIVATE((d)->common, state_use_accessors)
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