@@ -253,6 +253,62 @@ static int mchp_tc_count_read(struct counter_device *counter,
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return 0 ;
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}
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+ static int mchp_tc_count_cap_read (struct counter_device * counter ,
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+ struct counter_count * count , size_t idx , u64 * val )
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+ {
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+ struct mchp_tc_data * const priv = counter_priv (counter );
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+ u32 cnt ;
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+ int ret ;
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+
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+ switch (idx ) {
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+ case COUNTER_MCHP_EXCAP_RA :
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+ ret = regmap_read (priv -> regmap , ATMEL_TC_REG (priv -> channel [0 ], RA ), & cnt );
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+ break ;
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+ case COUNTER_MCHP_EXCAP_RB :
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+ ret = regmap_read (priv -> regmap , ATMEL_TC_REG (priv -> channel [0 ], RB ), & cnt );
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+ break ;
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+ default :
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+ return - EINVAL ;
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+ }
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+
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+ if (ret < 0 )
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+ return ret ;
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+
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+ * val = cnt ;
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+
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+ return 0 ;
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+ }
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+
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+ static int mchp_tc_count_cap_write (struct counter_device * counter ,
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+ struct counter_count * count , size_t idx , u64 val )
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+ {
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+ struct mchp_tc_data * const priv = counter_priv (counter );
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+ int ret ;
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+
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+ if (val > U32_MAX )
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+ return - ERANGE ;
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+
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+ switch (idx ) {
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+ case COUNTER_MCHP_EXCAP_RA :
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+ ret = regmap_write (priv -> regmap , ATMEL_TC_REG (priv -> channel [0 ], RA ), val );
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+ break ;
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+ case COUNTER_MCHP_EXCAP_RB :
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+ ret = regmap_write (priv -> regmap , ATMEL_TC_REG (priv -> channel [0 ], RB ), val );
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+ break ;
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+ default :
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+ return - EINVAL ;
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+ }
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+
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+ return ret ;
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+ }
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+
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+ static DEFINE_COUNTER_ARRAY_CAPTURE (mchp_tc_cnt_cap_array , 2 ) ;
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+
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+ static struct counter_comp mchp_tc_count_ext [] = {
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+ COUNTER_COMP_ARRAY_CAPTURE (mchp_tc_count_cap_read , mchp_tc_count_cap_write ,
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+ mchp_tc_cnt_cap_array ),
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+ };
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+
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static struct counter_count mchp_tc_counts [] = {
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{
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.id = 0 ,
@@ -261,6 +317,8 @@ static struct counter_count mchp_tc_counts[] = {
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.num_functions = ARRAY_SIZE (mchp_tc_count_functions ),
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.synapses = mchp_tc_count_synapses ,
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.num_synapses = ARRAY_SIZE (mchp_tc_count_synapses ),
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+ .ext = mchp_tc_count_ext ,
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+ .num_ext = ARRAY_SIZE (mchp_tc_count_ext ),
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},
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};
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