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iommu/mediatek: mt8188: Add iova_region_larb_msk
Add iova_region_larb_msk for mt8188. We separate the 16GB iova regions by each device's larbid/portid. Refer to include/dt-bindings/memory/mediatek,mt8188-memory-port.h As commented in the code, larb19(21) means it's larb19 while its SW index is 21. Signed-off-by: Yong Wu <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Alexandre Mergnat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/mtk_iommu.c

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@@ -1607,6 +1607,20 @@ static const struct mtk_iommu_plat_data mt8188_data_infra = {
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.iova_region_nr = ARRAY_SIZE(single_domain),
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};
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static const u32 mt8188_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = {
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[0] = {~0, ~0, ~0, ~0}, /* Region0: all ports for larb0/1/2/3 */
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[1] = {0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, ~0, ~0, ~0}, /* Region1: larb19(21)/21(22)/23 */
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[2] = {0, 0, 0, 0, ~0, ~0, ~0, ~0, /* Region2: the other larbs. */
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~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0,
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~0, ~0, ~0, ~0, ~0, 0, 0, 0,
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0, ~0},
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[3] = {0},
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[4] = {[24] = BIT(0) | BIT(1)}, /* Only larb27(24) port0/1 */
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[5] = {[24] = BIT(2) | BIT(3)}, /* Only larb27(24) port2/3 */
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};
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static const struct mtk_iommu_plat_data mt8188_data_vdo = {
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.m4u_plat = M4U_MT8188,
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.flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
@@ -1618,6 +1632,7 @@ static const struct mtk_iommu_plat_data mt8188_data_vdo = {
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.banks_enable = {true},
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.iova_region = mt8192_multi_dom,
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.iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
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.iova_region_larb_msk = mt8188_larb_region_msk,
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.larbid_remap = {{2}, {0}, {21}, {0}, {19}, {9, 10,
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11 /* 11a */, 25 /* 11c */},
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{13, 0, 29 /* 16b */, 30 /* 17b */, 0}, {5}},
@@ -1634,6 +1649,7 @@ static const struct mtk_iommu_plat_data mt8188_data_vpp = {
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.banks_enable = {true},
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.iova_region = mt8192_multi_dom,
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.iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
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.iova_region_larb_msk = mt8188_larb_region_msk,
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.larbid_remap = {{1}, {3}, {23}, {7}, {MTK_INVALID_LARBID},
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{12, 15, 24 /* 11b */}, {14, MTK_INVALID_LARBID,
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16 /* 16a */, 17 /* 17a */, MTK_INVALID_LARBID,

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