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Bartosz Golaszewski
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PCI/pwrctl: Add PCI power control core code
Some PCI devices must be powered-on before they can be detected on the bus. Introduce a simple framework reusing the existing PCI OF infrastructure. The way this works is: a DT node representing a PCI device connected to the port can be matched against its power control platform driver. If the match succeeds, the driver is responsible for powering-up the device and calling pci_pwrctl_device_set_ready() which will trigger a PCI bus rescan as well as subscribe to PCI bus notifications. When the device is detected and created, we'll make it consume the same DT node that the platform device did. When the device is bound, we'll create a device link between it and the parent power control device. Tested-by: Amit Pundir <[email protected]> Tested-by: Neil Armstrong <[email protected]> # on SM8550-QRD, SM8650-QRD & SM8650-HDK Tested-by: Caleb Connolly <[email protected]> # OnePlus 8T Acked-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bartosz Golaszewski <[email protected]>
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‎MAINTAINERS

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@@ -17349,6 +17349,14 @@ F: Documentation/driver-api/pci/p2pdma.rst
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F: drivers/pci/p2pdma.c
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F: include/linux/pci-p2pdma.h
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PCI POWER CONTROL
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M: Bartosz Golaszewski <[email protected]>
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L: [email protected]
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
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F: drivers/pci/pwrctl/*
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F: include/linux/pci-pwrctl.h
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PCI SUBSYSTEM
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M: Bjorn Helgaas <[email protected]>
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L: [email protected]

‎drivers/pci/Kconfig

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@@ -296,5 +296,6 @@ source "drivers/pci/hotplug/Kconfig"
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source "drivers/pci/controller/Kconfig"
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source "drivers/pci/endpoint/Kconfig"
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source "drivers/pci/switch/Kconfig"
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source "drivers/pci/pwrctl/Kconfig"
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endif

‎drivers/pci/Makefile

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@@ -9,6 +9,7 @@ obj-$(CONFIG_PCI) += access.o bus.o probe.o host-bridge.o \
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obj-$(CONFIG_PCI) += msi/
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obj-$(CONFIG_PCI) += pcie/
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obj-$(CONFIG_PCI) += pwrctl/
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ifdef CONFIG_PCI
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obj-$(CONFIG_PROC_FS) += proc.o

‎drivers/pci/pwrctl/Kconfig

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# SPDX-License-Identifier: GPL-2.0-only
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menu "PCI Power control drivers"
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config PCI_PWRCTL
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tristate
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endmenu

‎drivers/pci/pwrctl/Makefile

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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_PCI_PWRCTL) += pci-pwrctl-core.o
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pci-pwrctl-core-y := core.o

‎drivers/pci/pwrctl/core.c

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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2024 Linaro Ltd.
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*/
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/pci-pwrctl.h>
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#include <linux/property.h>
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#include <linux/slab.h>
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static int pci_pwrctl_notify(struct notifier_block *nb, unsigned long action,
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void *data)
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{
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struct pci_pwrctl *pwrctl = container_of(nb, struct pci_pwrctl, nb);
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struct device *dev = data;
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if (dev_fwnode(dev) != dev_fwnode(pwrctl->dev))
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return NOTIFY_DONE;
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switch (action) {
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case BUS_NOTIFY_ADD_DEVICE:
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/*
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* We will have two struct device objects bound to two different
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* drivers on different buses but consuming the same DT node. We
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* must not bind the pins twice in this case but only once for
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* the first device to be added.
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*
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* If we got here then the PCI device is the second after the
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* power control platform device. Mark its OF node as reused.
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*/
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dev->of_node_reused = true;
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break;
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case BUS_NOTIFY_BOUND_DRIVER:
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pwrctl->link = device_link_add(dev, pwrctl->dev,
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DL_FLAG_AUTOREMOVE_CONSUMER);
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if (!pwrctl->link)
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dev_err(pwrctl->dev, "Failed to add device link\n");
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break;
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case BUS_NOTIFY_UNBOUND_DRIVER:
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if (pwrctl->link)
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device_link_remove(dev, pwrctl->dev);
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break;
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}
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return NOTIFY_DONE;
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}
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/**
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* pci_pwrctl_device_set_ready() - Notify the pwrctl subsystem that the PCI
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* device is powered-up and ready to be detected.
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*
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* @pwrctl: PCI power control data.
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*
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* Returns:
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* 0 on success, negative error number on error.
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*
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* Note:
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* This function returning 0 doesn't mean the device was detected. It means,
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* that the bus rescan was successfully started. The device will get bound to
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* its PCI driver asynchronously.
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*/
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int pci_pwrctl_device_set_ready(struct pci_pwrctl *pwrctl)
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{
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int ret;
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if (!pwrctl->dev)
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return -ENODEV;
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pwrctl->nb.notifier_call = pci_pwrctl_notify;
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ret = bus_register_notifier(&pci_bus_type, &pwrctl->nb);
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if (ret)
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return ret;
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pci_lock_rescan_remove();
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pci_rescan_bus(to_pci_dev(pwrctl->dev->parent)->bus);
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pci_unlock_rescan_remove();
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return 0;
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}
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EXPORT_SYMBOL_GPL(pci_pwrctl_device_set_ready);
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/**
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* pci_pwrctl_device_unset_ready() - Notify the pwrctl subsystem that the PCI
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* device is about to be powered-down.
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*
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* @pwrctl: PCI power control data.
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*/
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void pci_pwrctl_device_unset_ready(struct pci_pwrctl *pwrctl)
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{
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/*
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* We don't have to delete the link here. Typically, this function
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* is only called when the power control device is being detached. If
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* it is being detached then the child PCI device must have already
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* been unbound too or the device core wouldn't let us unbind.
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*/
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bus_unregister_notifier(&pci_bus_type, &pwrctl->nb);
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}
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EXPORT_SYMBOL_GPL(pci_pwrctl_device_unset_ready);
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static void devm_pci_pwrctl_device_unset_ready(void *data)
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{
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struct pci_pwrctl *pwrctl = data;
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pci_pwrctl_device_unset_ready(pwrctl);
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}
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/**
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* devm_pci_pwrctl_device_set_ready - Managed variant of
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* pci_pwrctl_device_set_ready().
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*
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* @dev: Device managing this pwrctl provider.
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* @pwrctl: PCI power control data.
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*
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* Returns:
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* 0 on success, negative error number on error.
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*/
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int devm_pci_pwrctl_device_set_ready(struct device *dev,
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struct pci_pwrctl *pwrctl)
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{
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int ret;
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ret = pci_pwrctl_device_set_ready(pwrctl);
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if (ret)
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return ret;
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return devm_add_action_or_reset(dev,
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devm_pci_pwrctl_device_unset_ready,
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pwrctl);
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}
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EXPORT_SYMBOL_GPL(devm_pci_pwrctl_device_set_ready);
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MODULE_AUTHOR("Bartosz Golaszewski <[email protected]>");
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MODULE_DESCRIPTION("PCI Device Power Control core driver");
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MODULE_LICENSE("GPL");

‎include/linux/pci-pwrctl.h

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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2024 Linaro Ltd.
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*/
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#ifndef __PCI_PWRCTL_H__
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#define __PCI_PWRCTL_H__
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#include <linux/notifier.h>
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struct device;
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struct device_link;
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/*
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* This is a simple framework for solving the issue of PCI devices that require
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* certain resources (regulators, GPIOs, clocks) to be enabled before the
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* device can actually be detected on the PCI bus.
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*
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* The idea is to reuse the platform bus to populate OF nodes describing the
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* PCI device and its resources, let these platform devices probe and enable
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* relevant resources and then trigger a rescan of the PCI bus allowing for the
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* same device (with a second associated struct device) to be registered with
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* the PCI subsystem.
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*
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* To preserve a correct hierarchy for PCI power management and device reset,
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* we create a device link between the power control platform device (parent)
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* and the supplied PCI device (child).
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*/
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/**
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* struct pci_pwrctl - PCI device power control context.
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* @dev: Address of the power controlling device.
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*
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* An object of this type must be allocated by the PCI power control device and
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* passed to the pwrctl subsystem to trigger a bus rescan and setup a device
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* link with the device once it's up.
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*/
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struct pci_pwrctl {
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struct device *dev;
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/* Private: don't use. */
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struct notifier_block nb;
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struct device_link *link;
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};
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int pci_pwrctl_device_set_ready(struct pci_pwrctl *pwrctl);
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void pci_pwrctl_device_unset_ready(struct pci_pwrctl *pwrctl);
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int devm_pci_pwrctl_device_set_ready(struct device *dev,
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struct pci_pwrctl *pwrctl);
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#endif /* __PCI_PWRCTL_H__ */

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