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REG_S a0 , TASK_TI_A0(tp)
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csrr a0 , CSR_CAUSE
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/* Exclude IRQs */
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- blt a0 , zero, _new_vmalloc_restore_context_a0
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+ blt a0 , zero, .Lnew_vmalloc_restore_context_a0
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REG_S a1 , TASK_TI_A1(tp)
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/* Only check new_vmalloc if we are in page/protection fault */
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li a1 , EXC_LOAD_PAGE_FAULT
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- beq a0 , a1 , _new_vmalloc_kernel_address
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+ beq a0 , a1 , .Lnew_vmalloc_kernel_address
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li a1 , EXC_STORE_PAGE_FAULT
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- beq a0 , a1 , _new_vmalloc_kernel_address
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+ beq a0 , a1 , .Lnew_vmalloc_kernel_address
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li a1 , EXC_INST_PAGE_FAULT
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- bne a0 , a1 , _new_vmalloc_restore_context_a1
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+ bne a0 , a1 , .Lnew_vmalloc_restore_context_a1
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- _new_vmalloc_kernel_address :
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+ .Lnew_vmalloc_kernel_address :
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/* Is it a kernel address? */
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csrr a0 , CSR_TVAL
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- bge a0 , zero, _new_vmalloc_restore_context_a1
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+ bge a0 , zero, .Lnew_vmalloc_restore_context_a1
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/* Check if a new vmalloc mapping appeared that could explain the trap */
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REG_S a2 , TASK_TI_A2(tp)
@@ -69,7 +69,7 @@ _new_vmalloc_kernel_address:
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/* Check the value of new_vmalloc for this cpu */
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REG_L a2 , 0 (a0 )
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and a2 , a2 , a1
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- beq a2 , zero, _new_vmalloc_restore_context
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+ beq a2 , zero, .Lnew_vmalloc_restore_context
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/* Atomically reset the current cpu bit in new_vmalloc */
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amoxor.d a0 , a1 , (a0 )
@@ -83,11 +83,11 @@ _new_vmalloc_kernel_address:
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csrw CSR_SCRATCH, x0
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sret
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- _new_vmalloc_restore_context :
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+ .Lnew_vmalloc_restore_context :
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REG_L a2 , TASK_TI_A2(tp)
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- _new_vmalloc_restore_context_a1 :
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+ .Lnew_vmalloc_restore_context_a1 :
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REG_L a1 , TASK_TI_A1(tp)
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- _new_vmalloc_restore_context_a0 :
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+ .Lnew_vmalloc_restore_context_a0 :
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REG_L a0 , TASK_TI_A0(tp)
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.endm
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