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tgupdate: merge t/DO-NOT-MERGE-git-markup-features-other-trees into t/DO-NOT-MERGE-mptcp-use-kmalloc-on-kasan-build base
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‎Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml‎

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@@ -63,6 +63,14 @@ properties:
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"#size-cells":
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const: 0
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airoha,npu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the node used to configure the NPU module.
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The Airoha Network Processor Unit (NPU) provides a configuration
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interface to implement hardware flow offloading programming Packet
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Processor Engine (PPE) flow table.
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patternProperties:
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"^ethernet@[1-4]$":
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type: object
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<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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airoha,npu = <&npu>;
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#address-cells = <1>;
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#size-cells = <0>;
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‎Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Airoha Network Processor Unit for EN7581 SoC
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maintainers:
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- Lorenzo Bianconi <[email protected]>
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description:
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The Airoha Network Processor Unit (NPU) provides a configuration interface
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to implement wired and wireless hardware flow offloading programming Packet
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Processor Engine (PPE) flow table.
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properties:
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compatible:
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enum:
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- airoha,en7581-npu
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: mbox host irq line
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- description: watchdog0 irq line
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- description: watchdog1 irq line
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- description: watchdog2 irq line
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- description: watchdog3 irq line
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- description: watchdog4 irq line
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- description: watchdog5 irq line
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- description: watchdog6 irq line
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- description: watchdog7 irq line
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- description: wlan irq line0
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- description: wlan irq line1
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- description: wlan irq line2
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- description: wlan irq line3
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- description: wlan irq line4
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- description: wlan irq line5
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memory-region:
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maxItems: 1
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description:
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Memory used to store NPU firmware binary.
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required:
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- compatible
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- reg
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- interrupts
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- memory-region
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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npu@1e900000 {
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compatible = "airoha,en7581-npu";
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reg = <0 0x1e900000 0 0x313000>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&npu_binary>;
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};
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};

‎Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,gianfar-mdio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Gianfar (TSEC) MDIO Device
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description:
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This binding describes the MDIO is a bus to which the PHY devices are
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connected. For each device that exists on this bus, a child node should be
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created.
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Some TSECs are associated with an internal Ten-Bit Interface (TBI) PHY. This
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PHY is accessed through the local MDIO bus. These buses are defined similarly
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to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI
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PHYs underneath them are similar to normal PHYs, but the reg property is
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considered instructive, rather than descriptive. The reg property should be
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chosen so it doesn't interfere with other PHYs on the bus.
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maintainers:
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- J. Neuschäfer <[email protected]>
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# This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because
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# both use compatible = "gianfar" (with different device_type values)
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select:
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oneOf:
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- properties:
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compatible:
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contains:
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const: gianfar
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device_type:
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const: mdio
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required:
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- device_type
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- properties:
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compatible:
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contains:
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enum:
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- fsl,gianfar-tbi
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- fsl,gianfar-mdio
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- fsl,etsec2-tbi
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- fsl,etsec2-mdio
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- fsl,ucc-mdio
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- ucc_geth_phy
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required:
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- compatible
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properties:
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compatible:
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enum:
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- fsl,gianfar-tbi
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- fsl,gianfar-mdio
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- fsl,etsec2-tbi
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- fsl,etsec2-mdio
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- fsl,ucc-mdio
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- gianfar
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- ucc_geth_phy
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reg:
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minItems: 1
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items:
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- description:
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Offset and length of the register set for the device
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- description:
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Optionally, the offset and length of the TBIPA register (TBI PHY
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address register). If TBIPA register is not specified, the driver
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will attempt to infer it from the register set specified (your
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mileage may vary).
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device_type:
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const: mdio
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required:
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- reg
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- "#address-cells"
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- "#size-cells"
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allOf:
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- $ref: mdio.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: ucc_geth_phy
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then:
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required:
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- device_type
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unevaluatedProperties: false
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examples:
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- |
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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mdio@24520 {
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reg = <0x24520 0x20>;
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compatible = "fsl,gianfar-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@0 {
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reg = <0>;
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};
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};
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};

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