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arm64: sysreg: Migrate MDCR_EL2 definition to table
Migrate MDCR_EL2 over to the sysreg table and align definitions with DDI0601 2024-09. Reviewed-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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-29
lines changed

2 files changed

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lines changed

arch/arm64/include/asm/kvm_arm.h

Lines changed: 0 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -311,35 +311,6 @@
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GENMASK(19, 18) | \
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GENMASK(15, 0))
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314-
/* Hyp Debug Configuration Register bits */
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#define MDCR_EL2_E2TB_MASK (UL(0x3))
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#define MDCR_EL2_E2TB_SHIFT (UL(24))
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#define MDCR_EL2_HPMFZS (UL(1) << 36)
318-
#define MDCR_EL2_HPMFZO (UL(1) << 29)
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#define MDCR_EL2_MTPME (UL(1) << 28)
320-
#define MDCR_EL2_TDCC (UL(1) << 27)
321-
#define MDCR_EL2_HLP (UL(1) << 26)
322-
#define MDCR_EL2_HCCD (UL(1) << 23)
323-
#define MDCR_EL2_TTRF (UL(1) << 19)
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#define MDCR_EL2_HPMD (UL(1) << 17)
325-
#define MDCR_EL2_TPMS (UL(1) << 14)
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#define MDCR_EL2_E2PB_MASK (UL(0x3))
327-
#define MDCR_EL2_E2PB_SHIFT (UL(12))
328-
#define MDCR_EL2_TDRA (UL(1) << 11)
329-
#define MDCR_EL2_TDOSA (UL(1) << 10)
330-
#define MDCR_EL2_TDA (UL(1) << 9)
331-
#define MDCR_EL2_TDE (UL(1) << 8)
332-
#define MDCR_EL2_HPME (UL(1) << 7)
333-
#define MDCR_EL2_TPM (UL(1) << 6)
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#define MDCR_EL2_TPMCR (UL(1) << 5)
335-
#define MDCR_EL2_HPMN_MASK (UL(0x1F))
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#define MDCR_EL2_RES0 (GENMASK(63, 37) | \
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GENMASK(35, 30) | \
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GENMASK(25, 24) | \
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GENMASK(22, 20) | \
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BIT(18) | \
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GENMASK(16, 15))
342-
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/*
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* FGT register definitions
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*

arch/arm64/tools/sysreg

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2414,6 +2414,41 @@ Field 1 AFSR1_EL1
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Field 0 AFSR0_EL1
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EndSysregFields
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Sysreg MDCR_EL2 3 4 1 1 1
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Res0 63:51
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Field 50 EnSTEPOP
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Res0 49:44
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Field 43 EBWE
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Res0 42
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Field 41:40 PMEE
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Res0 39:37
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Field 36 HPMFZS
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Res0 35:32
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Field 31:30 PMSSE
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Field 29 HPMFZO
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Field 28 MTPME
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Field 27 TDCC
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Field 26 HLP
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Field 25:24 E2TB
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Field 23 HCCD
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Res0 22:20
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Field 19 TTRF
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Res0 18
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Field 17 HPMD
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Res0 16
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Field 15 EnSPM
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Field 14 TPMS
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Field 13:12 E2PB
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Field 11 TDRA
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Field 10 TDOSA
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Field 9 TDA
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Field 8 TDE
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Field 7 HPME
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Field 6 TPM
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Field 5 TPMCR
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Field 4:0 HPMN
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EndSysreg
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Sysreg HFGRTR_EL2 3 4 1 1 4
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Fields HFGxTR_EL2
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EndSysreg

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