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1 parent 76a6782 commit 696d107Copy full SHA for 696d107
Documentation/arch/arm64/amu.rst
@@ -80,7 +80,7 @@ bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to
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EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers
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are not trapped in EL2/EL3.
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-The fixed counters of AMUv1 are accessible though the following system
+The fixed counters of AMUv1 are accessible through the following system
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register definitions:
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- SYS_AMEVCNTR0_CORE_EL0
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