@@ -1310,6 +1310,19 @@ void arm_smmu_make_s1_cd(struct arm_smmu_cd *target,
1310
1310
target -> data [3 ] = cpu_to_le64 (cd -> mair );
1311
1311
}
1312
1312
1313
+ void arm_smmu_clear_cd (struct arm_smmu_master * master , ioasid_t ssid )
1314
+ {
1315
+ struct arm_smmu_cd target = {};
1316
+ struct arm_smmu_cd * cdptr ;
1317
+
1318
+ if (!master -> cd_table .cdtab )
1319
+ return ;
1320
+ cdptr = arm_smmu_get_cd_ptr (master , ssid );
1321
+ if (WARN_ON (!cdptr ))
1322
+ return ;
1323
+ arm_smmu_write_cd_entry (master , ssid , cdptr , & target );
1324
+ }
1325
+
1313
1326
int arm_smmu_write_ctx_desc (struct arm_smmu_master * master , int ssid ,
1314
1327
struct arm_smmu_ctx_desc * cd )
1315
1328
{
@@ -1320,7 +1333,6 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
1320
1333
* (2) Install a secondary CD, for SID+SSID traffic.
1321
1334
* (4) Quiesce the context without clearing the valid bit. Disable
1322
1335
* translation, and ignore any translation fault.
1323
- * (5) Remove a secondary CD.
1324
1336
*/
1325
1337
u64 val ;
1326
1338
struct arm_smmu_cd target ;
@@ -1339,10 +1351,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
1339
1351
target = * cd_table_entry ;
1340
1352
val = le64_to_cpu (cdptr -> data [0 ]);
1341
1353
1342
- if (!cd ) { /* (5) */
1343
- memset (cdptr , 0 , sizeof (* cdptr ));
1344
- val = 0 ;
1345
- } else if (cd == & quiet_cd ) { /* (4) */
1354
+ if (cd == & quiet_cd ) { /* (4) */
1346
1355
val &= ~(CTXDESC_CD_0_TCR_T0SZ | CTXDESC_CD_0_TCR_TG0 |
1347
1356
CTXDESC_CD_0_TCR_IRGN0 | CTXDESC_CD_0_TCR_ORGN0 |
1348
1357
CTXDESC_CD_0_TCR_SH0 );
@@ -2674,9 +2683,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
2674
2683
case ARM_SMMU_DOMAIN_S2 :
2675
2684
arm_smmu_make_s2_domain_ste (& target , master , smmu_domain );
2676
2685
arm_smmu_install_ste_for_dev (master , & target );
2677
- if (master -> cd_table .cdtab )
2678
- arm_smmu_write_ctx_desc (master , IOMMU_NO_PASID ,
2679
- NULL );
2686
+ arm_smmu_clear_cd (master , IOMMU_NO_PASID );
2680
2687
break ;
2681
2688
}
2682
2689
@@ -2724,8 +2731,7 @@ static int arm_smmu_attach_dev_ste(struct device *dev,
2724
2731
* arm_smmu_domain->devices to avoid races updating the same context
2725
2732
* descriptor from arm_smmu_share_asid().
2726
2733
*/
2727
- if (master -> cd_table .cdtab )
2728
- arm_smmu_write_ctx_desc (master , IOMMU_NO_PASID , NULL );
2734
+ arm_smmu_clear_cd (master , IOMMU_NO_PASID );
2729
2735
return 0 ;
2730
2736
}
2731
2737
0 commit comments