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Fix RK3588 power domain problems
Merge series from Sebastian Reichel <[email protected]>: This introduces devm_of_regulator_get without the _optional suffix, since that is more sensible for the Rockchip usecase.
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.mailmap

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@@ -376,6 +376,7 @@ Juha Yrjola <[email protected]>
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Karthikeyan Periyasamy <[email protected]> <[email protected]>
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CREDITS

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D: Initial implementation of VC's, pty's and select()
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N: Pavel Machek
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E: pavel@ucw.cz
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E: pavel@kernel.org
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P: 4096R/92DFCE96 4FA7 9EEF FCD4 C44F C585 B8C7 C060 2241 92DF CE96
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D: Softcursor for vga, hypertech cdrom support, vcsa bugfix, nbd,
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D: sun4/330 port, capabilities for elf, speedup for rm on ext2, USB,
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D: work on suspend-to-ram/disk, killing duplicates from ioctl32,
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D: NBD, Sun4/330 port, USB, work on suspend-to-ram/disk,
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D: Altera SoCFPGA and Nokia N900 support.
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S: Czech Republic
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Documentation/arch/arm64/gcs.rst

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shadow stacks rather than GCS.
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* Support for GCS is reported to userspace via HWCAP_GCS in the aux vector
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AT_HWCAP2 entry.
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AT_HWCAP entry.
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* GCS is enabled per thread. While there is support for disabling GCS
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at runtime this should be done with great care.

Documentation/devicetree/bindings/clock/qcom,gpucc.yaml

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@@ -8,6 +8,7 @@ title: Qualcomm Graphics Clock & Reset Controller
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maintainers:
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- Taniya Das <[email protected]>
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- Imran Shaik <[email protected]>
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description: |
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Qualcomm graphics clock control module provides the clocks, resets and power
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include/dt-bindings/clock/qcom,gpucc-sm8150.h
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include/dt-bindings/clock/qcom,gpucc-sm8250.h
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include/dt-bindings/clock/qcom,gpucc-sm8350.h
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include/dt-bindings/clock/qcom,qcs8300-gpucc.h
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properties:
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compatible:
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enum:
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- qcom,qcs8300-gpucc
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- qcom,sdm845-gpucc
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- qcom,sa8775p-gpucc
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- qcom,sc7180-gpucc

Documentation/devicetree/bindings/clock/qcom,sa8775p-camcc.yaml

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@@ -8,16 +8,20 @@ title: Qualcomm Camera Clock & Reset Controller on SA8775P
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maintainers:
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- Taniya Das <[email protected]>
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- Imran Shaik <[email protected]>
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description: |
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Qualcomm camera clock control module provides the clocks, resets and power
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domains on SA8775p.
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See also: include/dt-bindings/clock/qcom,sa8775p-camcc.h
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See also:
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include/dt-bindings/clock/qcom,qcs8300-camcc.h
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include/dt-bindings/clock/qcom,sa8775p-camcc.h
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properties:
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compatible:
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enum:
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- qcom,qcs8300-camcc
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- qcom,sa8775p-camcc
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clocks:

Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml

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enum:
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- qcom,qcs8300-videocc
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- qcom,sa8775p-videocc
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/powertip,hx8238a.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Powertip Electronic Technology Co. 320 x 240 LCD panel
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maintainers:
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- Lukasz Majewski <[email protected]>
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allOf:
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- $ref: panel-dpi.yaml#
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properties:
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compatible:
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items:
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- const: powertip,hx8238a
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- {} # panel-dpi, but not listed here to avoid false select
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height-mm: true
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panel-timing: true
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port: true
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power-supply: true
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width-mm: true
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additionalProperties: false
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...
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/powertip,st7272.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Powertip Electronic Technology Co. 320 x 240 LCD panel
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maintainers:
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- Lukasz Majewski <[email protected]>
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allOf:
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- $ref: panel-dpi.yaml#
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properties:
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compatible:
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items:
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- const: powertip,st7272
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- {} # panel-dpi, but not listed here to avoid false select
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height-mm: true
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panel-timing: true
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port: true
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power-supply: true
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width-mm: true
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additionalProperties: false
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...

Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml

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enum:
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- ti,am625-dss
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- ti,am62a7,dss
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- ti,am62a7-dss
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- ti,am65x-dss
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Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml

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The Microchip LAN966x outband interrupt controller (OIC) maps the internal
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interrupt sources of the LAN966x device to an external interrupt.
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When the LAN966x device is used as a PCI device, the external interrupt is
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routed to the PCI interrupt.
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interrupt sources of the LAN966x device to a PCI interrupt when the LAN966x
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device is used as a PCI device.
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