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26 | 26 | #include <asm/asm-offsets.h>
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27 | 27 | #include <linux/of_fdt.h>
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28 | 28 |
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29 |
| -#define tophys(rd,rs) \ |
30 |
| - l.movhi rd,hi(-KERNELBASE) ;\ |
| 29 | +#define tophys(rd,rs) \ |
| 30 | + l.movhi rd,hi(-KERNELBASE) ;\ |
31 | 31 | l.add rd,rd,rs
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32 | 32 |
|
33 |
| -#define CLEAR_GPR(gpr) \ |
| 33 | +#define CLEAR_GPR(gpr) \ |
34 | 34 | l.movhi gpr,0x0
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35 | 35 |
|
36 |
| -#define LOAD_SYMBOL_2_GPR(gpr,symbol) \ |
37 |
| - l.movhi gpr,hi(symbol) ;\ |
| 36 | +#define LOAD_SYMBOL_2_GPR(gpr,symbol) \ |
| 37 | + l.movhi gpr,hi(symbol) ;\ |
38 | 38 | l.ori gpr,gpr,lo(symbol)
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39 | 39 |
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40 | 40 |
|
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326 | 326 | l.addi r1,r1,-(INT_FRAME_SIZE) ;\
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327 | 327 | /* r1 is KSP, r30 is __pa(KSP) */ ;\
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328 | 328 | tophys (r30,r1) ;\
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329 |
| - l.sw PT_GPR12(r30),r12 ;\ |
| 329 | + l.sw PT_GPR12(r30),r12 ;\ |
330 | 330 | l.mfspr r12,r0,SPR_EPCR_BASE ;\
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331 | 331 | l.sw PT_PC(r30),r12 ;\
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332 | 332 | l.mfspr r12,r0,SPR_ESR_BASE ;\
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333 | 333 | l.sw PT_SR(r30),r12 ;\
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334 | 334 | /* save r31 */ ;\
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335 | 335 | EXCEPTION_T_LOAD_GPR30(r12) ;\
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336 |
| - l.sw PT_GPR30(r30),r12 ;\ |
| 336 | + l.sw PT_GPR30(r30),r12 ;\ |
337 | 337 | /* save r10 as was prior to exception */ ;\
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338 | 338 | EXCEPTION_T_LOAD_GPR10(r12) ;\
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339 |
| - l.sw PT_GPR10(r30),r12 ;\ |
340 |
| - /* save PT_SP as was prior to exception */ ;\ |
| 339 | + l.sw PT_GPR10(r30),r12 ;\ |
| 340 | + /* save PT_SP as was prior to exception */ ;\ |
341 | 341 | EXCEPTION_T_LOAD_SP(r12) ;\
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342 | 342 | l.sw PT_SP(r30),r12 ;\
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343 |
| - l.sw PT_GPR13(r30),r13 ;\ |
| 343 | + l.sw PT_GPR13(r30),r13 ;\ |
344 | 344 | /* --> */ ;\
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345 | 345 | /* save exception r4, set r4 = EA */ ;\
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346 | 346 | l.sw PT_GPR4(r30),r4 ;\
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@@ -396,7 +396,7 @@ _dispatch_do_ipage_fault:
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396 | 396 | .org 0x500
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397 | 397 | EXCEPTION_HANDLE(_timer_handler)
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398 | 398 |
|
399 |
| -/* ---[ 0x600: Alignment exception ]-------------------------------------- */ |
| 399 | +/* ---[ 0x600: Alignment exception ]------------------------------------- */ |
400 | 400 | .org 0x600
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401 | 401 | EXCEPTION_HANDLE(_alignment_handler)
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402 | 402 |
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@@ -426,7 +426,7 @@ _dispatch_do_ipage_fault:
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426 | 426 | .org 0xc00
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427 | 427 | EXCEPTION_HANDLE(_sys_call_handler)
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428 | 428 |
|
429 |
| -/* ---[ 0xd00: Floating point exception ]--------------------------------- */ |
| 429 | +/* ---[ 0xd00: Floating point exception ]-------------------------------- */ |
430 | 430 | .org 0xd00
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431 | 431 | EXCEPTION_HANDLE(_fpe_trap_handler)
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432 | 432 |
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@@ -818,7 +818,7 @@ secondary_start:
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818 | 818 |
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819 | 819 | #endif
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820 | 820 |
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821 |
| -/* ========================================[ cache ]=== */ |
| 821 | +/* ==========================================================[ cache ]=== */ |
822 | 822 |
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823 | 823 | /* alignment here so we don't change memory offsets with
|
824 | 824 | * memory controller defined
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