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regulator: axp20x: AXP717: set ramp_delay
AXP717 datasheet says that regulator ramp delay is 15.625 us/step, which is 10mV in our case. Add a AXP_DESC_RANGES_DELAY macro and update AXP_DESC_RANGES macro to expand to AXP_DESC_RANGES_DELAY with ramp_delay = 0 For DCDC4, steps is 100mv Add a AXP_DESC_DELAY macro and update AXP_DESC macro to expand to AXP_DESC_DELAY with ramp_delay = 0 This patch fix crashes when using CPU DVFS. Signed-off-by: Philippe Simons <[email protected]> Tested-by: Hironori KIKUCHI <[email protected]> Tested-by: Chris Morgan <[email protected]> Reviewed-by: Chen-Yu Tsai <[email protected]> Fixes: d2ac3df ("regulator: axp20x: add support for the AXP717") Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
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drivers/regulator/axp20x-regulator.c

Lines changed: 24 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -371,8 +371,8 @@
371371
.ops = &axp20x_ops, \
372372
}
373373

374-
#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
375-
_vmask, _ereg, _emask) \
374+
#define AXP_DESC_DELAY(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
375+
_vmask, _ereg, _emask, _ramp_delay) \
376376
[_family##_##_id] = { \
377377
.name = (_match), \
378378
.supply_name = (_supply), \
@@ -388,9 +388,15 @@
388388
.vsel_mask = (_vmask), \
389389
.enable_reg = (_ereg), \
390390
.enable_mask = (_emask), \
391+
.ramp_delay = (_ramp_delay), \
391392
.ops = &axp20x_ops, \
392393
}
393394

395+
#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
396+
_vmask, _ereg, _emask) \
397+
AXP_DESC_DELAY(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
398+
_vmask, _ereg, _emask, 0)
399+
394400
#define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \
395401
[_family##_##_id] = { \
396402
.name = (_match), \
@@ -419,8 +425,8 @@
419425
.ops = &axp20x_ops_fixed \
420426
}
421427

422-
#define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \
423-
_vreg, _vmask, _ereg, _emask) \
428+
#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, _n_voltages, \
429+
_vreg, _vmask, _ereg, _emask, _ramp_delay) \
424430
[_family##_##_id] = { \
425431
.name = (_match), \
426432
.supply_name = (_supply), \
@@ -436,9 +442,15 @@
436442
.enable_mask = (_emask), \
437443
.linear_ranges = (_ranges), \
438444
.n_linear_ranges = ARRAY_SIZE(_ranges), \
445+
.ramp_delay = (_ramp_delay), \
439446
.ops = &axp20x_ops_range, \
440447
}
441448

449+
#define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \
450+
_vreg, _vmask, _ereg, _emask) \
451+
AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \
452+
_n_voltages, _vreg, _vmask, _ereg, _emask, 0)
453+
442454
static const int axp209_dcdc2_ldo3_slew_rates[] = {
443455
1600,
444456
800,
@@ -781,21 +793,21 @@ static const struct linear_range axp717_dcdc3_ranges[] = {
781793
};
782794

783795
static const struct regulator_desc axp717_regulators[] = {
784-
AXP_DESC_RANGES(AXP717, DCDC1, "dcdc1", "vin1",
796+
AXP_DESC_RANGES_DELAY(AXP717, DCDC1, "dcdc1", "vin1",
785797
axp717_dcdc1_ranges, AXP717_DCDC1_NUM_VOLTAGES,
786798
AXP717_DCDC1_CONTROL, AXP717_DCDC_V_OUT_MASK,
787-
AXP717_DCDC_OUTPUT_CONTROL, BIT(0)),
788-
AXP_DESC_RANGES(AXP717, DCDC2, "dcdc2", "vin2",
799+
AXP717_DCDC_OUTPUT_CONTROL, BIT(0), 640),
800+
AXP_DESC_RANGES_DELAY(AXP717, DCDC2, "dcdc2", "vin2",
789801
axp717_dcdc2_ranges, AXP717_DCDC2_NUM_VOLTAGES,
790802
AXP717_DCDC2_CONTROL, AXP717_DCDC_V_OUT_MASK,
791-
AXP717_DCDC_OUTPUT_CONTROL, BIT(1)),
792-
AXP_DESC_RANGES(AXP717, DCDC3, "dcdc3", "vin3",
803+
AXP717_DCDC_OUTPUT_CONTROL, BIT(1), 640),
804+
AXP_DESC_RANGES_DELAY(AXP717, DCDC3, "dcdc3", "vin3",
793805
axp717_dcdc3_ranges, AXP717_DCDC3_NUM_VOLTAGES,
794806
AXP717_DCDC3_CONTROL, AXP717_DCDC_V_OUT_MASK,
795-
AXP717_DCDC_OUTPUT_CONTROL, BIT(2)),
796-
AXP_DESC(AXP717, DCDC4, "dcdc4", "vin4", 1000, 3700, 100,
807+
AXP717_DCDC_OUTPUT_CONTROL, BIT(2), 640),
808+
AXP_DESC_DELAY(AXP717, DCDC4, "dcdc4", "vin4", 1000, 3700, 100,
797809
AXP717_DCDC4_CONTROL, AXP717_DCDC_V_OUT_MASK,
798-
AXP717_DCDC_OUTPUT_CONTROL, BIT(3)),
810+
AXP717_DCDC_OUTPUT_CONTROL, BIT(3), 6400),
799811
AXP_DESC(AXP717, ALDO1, "aldo1", "aldoin", 500, 3500, 100,
800812
AXP717_ALDO1_CONTROL, AXP717_LDO_V_OUT_MASK,
801813
AXP717_LDO0_OUTPUT_CONTROL, BIT(0)),

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