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tgupdate: merge t/DO-NOT-MERGE-mptcp-enabled-by-default into t/upstream base
2 parents 7d0b41f + fe5ca79 commit ff53405

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.mailmap

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@@ -529,6 +529,8 @@ Oleksij Rempel <[email protected]> <[email protected]>
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Oleksij Rempel <[email protected]>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/atmel,at91sam9263-can.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip AT91 CAN Controller
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maintainers:
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- Nicolas Ferre <[email protected]>
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allOf:
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- $ref: can-controller.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- atmel,at91sam9263-can
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- atmel,at91sam9x5-can
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- items:
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- enum:
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- microchip,sam9x60-can
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- const: atmel,at91sam9x5-can
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: can_clk
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/at91.h>
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can@f000c000 {
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compatible = "atmel,at91sam9263-can";
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reg = <0xf000c000 0x300>;
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interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
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clock-names = "can_clk";
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};

Documentation/devicetree/bindings/net/can/atmel-can.txt

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Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml

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properties:
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compatible:
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const: microchip,mpfs-can
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oneOf:
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- items:
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- const: microchip,pic64gx-can
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- const: microchip,mpfs-can
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- const: microchip,mpfs-can
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reg:
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maxItems: 1

Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml

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maxItems: 1
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st,gcan:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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The phandle to the gcan node which allows to access the 512-bytes
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SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2

Documentation/devicetree/bindings/net/can/tcan4x5x.txt

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/ti,tcan4x5x.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments TCAN4x5x CAN Controller
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maintainers:
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- Marc Kleine-Budde <[email protected]>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- ti,tcan4552
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- ti,tcan4553
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- const: ti,tcan4x5x
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- const: ti,tcan4x5x
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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description: The GPIO parent interrupt.
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: cclk
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reset-gpios:
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description: Hardwired output GPIO. If not defined then software reset.
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maxItems: 1
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device-state-gpios:
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description:
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Input GPIO that indicates if the device is in a sleep state or if the
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device is active. Not available with tcan4552/4553.
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maxItems: 1
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device-wake-gpios:
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description:
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Wake up GPIO to wake up the TCAN device.
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Not available with tcan4552/4553.
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maxItems: 1
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bosch,mram-cfg:
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description: |
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Message RAM configuration data.
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Multiple M_CAN instances can share the same Message RAM
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and each element(e.g Rx FIFO or Tx Buffer and etc) number
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in Message RAM is also configurable, so this property is
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telling driver how the shared or private Message RAM are
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used by this M_CAN controller.
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The format should be as follows:
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<offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems>
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The 'offset' is an address offset of the Message RAM where
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the following elements start from. This is usually set to
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0x0 if you're using a private Message RAM. The remain cells
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are used to specify how many elements are used for each FIFO/Buffer.
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M_CAN includes the following elements according to user manual:
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11-bit Filter 0-128 elements / 0-128 words
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29-bit Filter 0-64 elements / 0-128 words
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Rx FIFO 0 0-64 elements / 0-1152 words
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Rx FIFO 1 0-64 elements / 0-1152 words
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Rx Buffers 0-64 elements / 0-1152 words
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Tx Event FIFO 0-32 elements / 0-64 words
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Tx Buffers 0-32 elements / 0-576 words
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Please refer to 2.4.1 Message RAM Configuration in Bosch
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M_CAN user manual for details.
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$ref: /schemas/types.yaml#/definitions/int32-array
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items:
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- description: The 'offset' is an address offset of the Message RAM where
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the following elements start from. This is usually set to 0x0 if
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you're using a private Message RAM.
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default: 0
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- description: 11-bit Filter 0-128 elements / 0-128 words
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minimum: 0
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maximum: 128
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- description: 29-bit Filter 0-64 elements / 0-128 words
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minimum: 0
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maximum: 64
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- description: Rx FIFO 0 0-64 elements / 0-1152 words
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minimum: 0
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maximum: 64
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- description: Rx FIFO 1 0-64 elements / 0-1152 words
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minimum: 0
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maximum: 64
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- description: Rx Buffers 0-64 elements / 0-1152 words
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minimum: 0
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maximum: 64
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- description: Tx Event FIFO 0-32 elements / 0-64 words
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minimum: 0
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maximum: 32
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- description: Tx Buffers 0-32 elements / 0-576 words
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minimum: 0
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maximum: 32
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minItems: 1
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spi-max-frequency:
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description:
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Must be half or less of "clocks" frequency.
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maximum: 18000000
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ti,nwkrq-voltage-vio:
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type: boolean
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description:
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nWKRQ Pin GPO buffer voltage configuration.
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Set nWKRQ to use VIO voltage rail.
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When not set nWKRQ will use internal voltage rail.
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wakeup-source:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Enable CAN remote wakeup.
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allOf:
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- $ref: can-controller.yaml#
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- ti,tcan4552
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- ti,tcan4553
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then:
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properties:
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device-state-gpios: false
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device-wake-gpios: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- bosch,mram-cfg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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can@0 {
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compatible = "ti,tcan4x5x";
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reg = <0>;
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clocks = <&can0_osc>;
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clock-names = "cclk";
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pinctrl-names = "default";
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pinctrl-0 = <&can0_pins>;
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spi-max-frequency = <10000000>;
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bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
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device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
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device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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ti,nwkrq-voltage-vio;
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wakeup-source;
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};
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};
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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can@0 {
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compatible = "ti,tcan4552", "ti,tcan4x5x";
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reg = <0>;
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clocks = <&can0_osc>;
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clock-names = "cclk";
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pinctrl-names = "default";
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pinctrl-0 = <&can0_pins>;
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spi-max-frequency = <10000000>;
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bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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wakeup-source;
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};
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};

MAINTAINERS

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F: include/uapi/linux/can/isotp.h
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F: include/uapi/linux/can/raw.h
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F: net/can/
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F: net/sched/em_canid.c
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CAN-J1939 NETWORK LAYER
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M: Robin van der Gracht <[email protected]>

drivers/net/can/dev/dev.c

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default:
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return "<unknown>";
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}
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return "<unknown>";
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}
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EXPORT_SYMBOL_GPL(can_get_state_str);
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