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HoppeMateuszCompute-Runtime-Automation
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Change DebugMode and TdCtl registers on xehp
- refactor tests to use UnitTestHelper Signed-off-by: Mateusz Hoppe <[email protected]>
1 parent e7a7a61 commit 0e58821

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12 files changed

+190
-8
lines changed

12 files changed

+190
-8
lines changed

‎level_zero/core/test/unit_tests/sources/debugger/test_source_level_debugger.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ namespace ult {
2727

2828
using CommandQueueDebugCommandsTest = Test<ActiveDebuggerFixture>;
2929

30-
HWTEST2_F(CommandQueueDebugCommandsTest, givenDebuggingEnabledWhenCommandListIsExecutedThenKernelDebugCommandsAreAdded, IsAtMostXeHpCore) {
30+
HWTEST2_F(CommandQueueDebugCommandsTest, givenDebuggingEnabledWhenCommandListIsExecutedThenKernelDebugCommandsAreAdded, IsAtMostGen12lp) {
3131
NEO::MockCompilerEnableGuard mock(true);
3232
ze_command_queue_desc_t queueDesc = {};
3333
ze_result_t returnValue;
@@ -74,7 +74,7 @@ HWTEST2_F(CommandQueueDebugCommandsTest, givenDebuggingEnabledWhenCommandListIsE
7474
commandQueue->destroy();
7575
}
7676

77-
HWTEST2_F(CommandQueueDebugCommandsTest, givenDebuggingEnabledWhenCommandListIsExecutedTwiceThenKernelDebugCommandsAreAddedOnlyOnce, IsAtMostXeHpCore) {
77+
HWTEST2_F(CommandQueueDebugCommandsTest, givenDebuggingEnabledWhenCommandListIsExecutedTwiceThenKernelDebugCommandsAreAddedOnlyOnce, IsAtMostGen12lp) {
7878
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
7979
using STATE_SIP = typename FamilyType::STATE_SIP;
8080

‎level_zero/core/test/unit_tests/xe_hp_core/test_cmdqueue_debugger_xe_hp_core.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ XEHPTEST_F(CommandQueueDebugCommandsForSldXeHP, givenSteppingA0OrBWhenGlobalSipI
7171
if (miLoad->getRegisterOffset() == GlobalSipRegister<FamilyType>::registerOffset) {
7272
globalSip.push_back(miLoad);
7373
globalSipFound++;
74-
} else if (miLoad->getRegisterOffset() == DebugModeRegisterOffset<FamilyType>::registerOffset) {
74+
} else if (miLoad->getRegisterOffset() == 0x20d8u) {
7575
debugModeFound++;
7676
} else if (miLoad->getRegisterOffset() == TdDebugControlRegisterOffset<FamilyType>::registerOffset) {
7777
tdCtlFound++;

‎shared/source/helpers/preamble_xehp_and_later.inl‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -147,4 +147,20 @@ uint32_t PreambleHelper<Family>::getL3Config(const HardwareInfo &hwInfo, bool us
147147
template <>
148148
const uint32_t L3CNTLRegisterOffset<Family>::registerOffset = std::numeric_limits<uint32_t>::max();
149149

150+
template <>
151+
struct DebugModeRegisterOffset<Family> {
152+
enum {
153+
registerOffset = 0x20d8,
154+
debugEnabledValue = (1 << 5) | (1 << 21)
155+
};
156+
};
157+
158+
template <>
159+
struct TdDebugControlRegisterOffset<Family> {
160+
enum {
161+
registerOffset = 0xe400,
162+
debugEnabledValue = (1 << 7) | (1 << 4) | (1 << 2) | (1 << 0)
163+
};
164+
};
165+
150166
} // namespace NEO

‎shared/test/common/gen11/test_preamble_gen11.cpp‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -160,3 +160,30 @@ GEN11TEST_F(ThreadArbitrationGen11, whenGetSupportThreadArbitrationPoliciesIsCal
160160
supportedPolicies.end(),
161161
ThreadArbitrationPolicy::RoundRobinAfterDependency));
162162
}
163+
using PreambleFixtureGen11 = PreambleFixture;
164+
GEN11TEST_F(PreambleFixtureGen11, whenKernelDebuggingCommandsAreProgrammedThenCorrectRegisterAddressesAndValuesAreSet) {
165+
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
166+
167+
auto bufferSize = PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(true);
168+
auto buffer = std::unique_ptr<char[]>(new char[bufferSize]);
169+
170+
LinearStream stream(buffer.get(), bufferSize);
171+
PreambleHelper<FamilyType>::programKernelDebugging(&stream);
172+
173+
HardwareParse hwParser;
174+
hwParser.parseCommands<FamilyType>(stream);
175+
auto cmdList = hwParser.getCommandsList<MI_LOAD_REGISTER_IMM>();
176+
177+
ASSERT_EQ(2u, cmdList.size());
178+
179+
auto it = cmdList.begin();
180+
181+
MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
182+
EXPECT_EQ(0x20d8u, pCmd->getRegisterOffset());
183+
EXPECT_EQ((1u << 5) | (1u << 21), pCmd->getDataDword());
184+
it++;
185+
186+
pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
187+
EXPECT_EQ(0xe400u, pCmd->getRegisterOffset());
188+
EXPECT_EQ((1u << 7) | (1u << 4), pCmd->getDataDword());
189+
}

‎shared/test/common/gen11/unit_test_helper_gen11.cpp‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,5 +11,27 @@
1111

1212
namespace NEO {
1313

14+
using Family = ICLFamily;
15+
16+
template <>
17+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
18+
return 0x20d8;
19+
}
20+
21+
template <>
22+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
23+
return (1u << 5) | (1u << 21);
24+
}
25+
26+
template <>
27+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
28+
return 0xe400;
29+
}
30+
31+
template <>
32+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
33+
return (1u << 7) | (1u << 4);
34+
}
35+
1436
template struct UnitTestHelper<ICLFamily>;
1537
} // namespace NEO

‎shared/test/common/gen12lp/test_preamble_gen12lp.cpp‎

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -203,3 +203,31 @@ GEN12LPTEST_F(PreemptionWatermarkGen12LP, WhenPreambleIsCreatedThenPreambleWorkA
203203
expectedSize += PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(mockDevice.isDebuggerActive());
204204
EXPECT_EQ(expectedSize, PreambleHelper<FamilyType>::getAdditionalCommandsSize(mockDevice));
205205
}
206+
207+
using PreambleFixtureGen12lp = PreambleFixture;
208+
GEN12LPTEST_F(PreambleFixtureGen12lp, whenKernelDebuggingCommandsAreProgrammedThenCorrectRegisterAddressesAndValuesAreSet) {
209+
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
210+
211+
auto bufferSize = PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(true);
212+
auto buffer = std::unique_ptr<char[]>(new char[bufferSize]);
213+
214+
LinearStream stream(buffer.get(), bufferSize);
215+
PreambleHelper<FamilyType>::programKernelDebugging(&stream);
216+
217+
HardwareParse hwParser;
218+
hwParser.parseCommands<FamilyType>(stream);
219+
auto cmdList = hwParser.getCommandsList<MI_LOAD_REGISTER_IMM>();
220+
221+
ASSERT_EQ(2u, cmdList.size());
222+
223+
auto it = cmdList.begin();
224+
225+
MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
226+
EXPECT_EQ(0x20d8u, pCmd->getRegisterOffset());
227+
EXPECT_EQ((1u << 5) | (1u << 21), pCmd->getDataDword());
228+
it++;
229+
230+
pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
231+
EXPECT_EQ(0xe400u, pCmd->getRegisterOffset());
232+
EXPECT_EQ((1u << 7) | (1u << 4), pCmd->getDataDword());
233+
}

‎shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,5 +30,25 @@ bool UnitTestHelper<Family>::isPipeControlWArequired(const HardwareInfo &hwInfo)
3030
return SpecialUltHelperGen12lp::isPipeControlWArequired(hwInfo.platform.eProductFamily);
3131
}
3232

33+
template <>
34+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
35+
return 0x20d8;
36+
}
37+
38+
template <>
39+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
40+
return (1u << 5) | (1u << 21);
41+
}
42+
43+
template <>
44+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
45+
return 0xe400;
46+
}
47+
48+
template <>
49+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
50+
return (1u << 7) | (1u << 4);
51+
}
52+
3353
template struct UnitTestHelper<Family>;
3454
} // namespace NEO

‎shared/test/common/gen8/unit_test_helper_gen8.cpp‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,5 +11,27 @@
1111

1212
namespace NEO {
1313

14+
using Family = BDWFamily;
15+
16+
template <>
17+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
18+
return 0x20ec;
19+
}
20+
21+
template <>
22+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
23+
return (1u << 6) | (1u << 22);
24+
}
25+
26+
template <>
27+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
28+
return 0xe400;
29+
}
30+
31+
template <>
32+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
33+
return (1u << 7) | (1u << 4);
34+
}
35+
1436
template struct UnitTestHelper<BDWFamily>;
1537
} // namespace NEO

‎shared/test/common/gen9/unit_test_helper_gen9.cpp‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,5 +17,25 @@ bool UnitTestHelper<Family>::isPipeControlWArequired(const HardwareInfo &hwInfo)
1717
return true;
1818
}
1919

20+
template <>
21+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
22+
return 0x20ec;
23+
}
24+
25+
template <>
26+
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
27+
return (1u << 6) | (1u << 22);
28+
}
29+
30+
template <>
31+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
32+
return 0xe400;
33+
}
34+
35+
template <>
36+
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
37+
return (1u << 7) | (1u << 4);
38+
}
39+
2040
template struct UnitTestHelper<Family>;
2141
} // namespace NEO

‎shared/test/common/helpers/unit_test_helper.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,11 @@ struct UnitTestHelper {
5151

5252
static void setExtraMidThreadPreemptionFlag(HardwareInfo &hwInfo, bool value);
5353

54+
static uint32_t getDebugModeRegisterOffset();
55+
static uint32_t getDebugModeRegisterValue();
56+
static uint32_t getTdCtlRegisterOffset();
57+
static uint32_t getTdCtlRegisterValue();
58+
5459
static const bool tiledImagesSupported;
5560

5661
static const uint32_t smallestTestableSimdSize;

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