refactor: Move all constants to L0 namespace in level_zero/tools

Related-To: NEO-12769

- Use inline constexpr for declaring global variables
- Avoid using Macros
- Use string_view type instead of std::string

Signed-off-by: Harini Kumaran <[email protected]>

Author: harinik124

level_zero/tools/source/sysman/firmware/linux/os_firmware_imp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -45,7 +45,7 @@ ze_result_t OsFirmware::getSupportedFwTypes(std::vector<std::string> &supportedF
 
 void LinuxFirmwareImp::osGetFwProperties(zes_firmware_properties_t *pProperties) {
     if (ZE_RESULT_SUCCESS != getFirmwareVersion(osFwType, pProperties)) {
-        strncpy_s(static_cast<char *>(pProperties->version), ZES_STRING_PROPERTY_SIZE, unknown.c_str(), ZES_STRING_PROPERTY_SIZE - 1);
+        strncpy_s(static_cast<char *>(pProperties->version), ZES_STRING_PROPERTY_SIZE, unknown.data(), ZES_STRING_PROPERTY_SIZE - 1);
     }
     pProperties->canControl = true; // Assuming that user has permission to flash the firmware
 }

level_zero/tools/source/sysman/firmware/windows/os_firmware_imp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -25,7 +25,7 @@ ze_result_t WddmFirmwareImp::getFirmwareVersion(std::string fwType, zes_firmware
 
 void WddmFirmwareImp::osGetFwProperties(zes_firmware_properties_t *pProperties) {
     if (ZE_RESULT_SUCCESS != getFirmwareVersion(osFwType, pProperties)) {
-        strncpy_s(static_cast<char *>(pProperties->version), ZES_STRING_PROPERTY_SIZE, unknown.c_str(), ZES_STRING_PROPERTY_SIZE);
+        strncpy_s(static_cast<char *>(pProperties->version), ZES_STRING_PROPERTY_SIZE, unknown.data(), ZES_STRING_PROPERTY_SIZE);
     }
     pProperties->canControl = true; // Assuming that user has permission to flash the firmware
 }

level_zero/tools/source/sysman/global_operations/global_operations_imp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -81,11 +81,11 @@ void GlobalOperationsImp::init() {
     pOsGlobalOperations->getBrandName(sysmanProperties.brandName);
     memset(sysmanProperties.boardNumber, 0, ZES_STRING_PROPERTY_SIZE);
     if (!pOsGlobalOperations->getBoardNumber(sysmanProperties.boardNumber)) {
-        memcpy_s(sysmanProperties.boardNumber, ZES_STRING_PROPERTY_SIZE, unknown.c_str(), unknown.length() + 1);
+        memcpy_s(sysmanProperties.boardNumber, ZES_STRING_PROPERTY_SIZE, unknown.data(), unknown.length() + 1);
     }
     memset(sysmanProperties.serialNumber, 0, ZES_STRING_PROPERTY_SIZE);
     if (!pOsGlobalOperations->getSerialNumber(sysmanProperties.serialNumber)) {
-        memcpy_s(sysmanProperties.serialNumber, ZES_STRING_PROPERTY_SIZE, unknown.c_str(), unknown.length() + 1);
+        memcpy_s(sysmanProperties.serialNumber, ZES_STRING_PROPERTY_SIZE, unknown.data(), unknown.length() + 1);
     }
 }
 void GlobalOperationsImp::initGlobalOperations() {

level_zero/tools/source/sysman/global_operations/linux/os_global_operations_imp.cpp

@@ -146,13 +146,13 @@ void LinuxGlobalOperationsImp::getBrandName(char (&brandName)[ZES_STRING_PROPERT
     std::string strVal;
     ze_result_t result = pSysfsAccess->read(subsystemVendorFile, strVal);
     if (ZE_RESULT_SUCCESS != result) {
-        std::strncpy(brandName, unknown.c_str(), ZES_STRING_PROPERTY_SIZE);
+        std::strncpy(brandName, unknown.data(), ZES_STRING_PROPERTY_SIZE);
         return;
     }
     if (strVal.compare(intelPciId) == 0) {
-        std::strncpy(brandName, vendorIntel.c_str(), ZES_STRING_PROPERTY_SIZE);
+        std::strncpy(brandName, vendorIntel.data(), ZES_STRING_PROPERTY_SIZE);
     } else {
-        std::strncpy(brandName, unknown.c_str(), ZES_STRING_PROPERTY_SIZE);
+        std::strncpy(brandName, unknown.data(), ZES_STRING_PROPERTY_SIZE);
     }
 }
 
@@ -168,15 +168,15 @@ void LinuxGlobalOperationsImp::getVendorName(char (&vendorName)[ZES_STRING_PROPE
     std::stringstream pciId;
     pciId << std::hex << coreDeviceProperties.vendorId;
     if (("0x" + pciId.str()).compare(intelPciId) == 0) {
-        std::strncpy(vendorName, vendorIntel.c_str(), ZES_STRING_PROPERTY_SIZE);
+        std::strncpy(vendorName, vendorIntel.data(), ZES_STRING_PROPERTY_SIZE);
     } else {
-        std::strncpy(vendorName, unknown.c_str(), ZES_STRING_PROPERTY_SIZE);
+        std::strncpy(vendorName, unknown.data(), ZES_STRING_PROPERTY_SIZE);
     }
 }
 
 void LinuxGlobalOperationsImp::getDriverVersion(char (&driverVersion)[ZES_STRING_PROPERTY_SIZE]) {
     std::string strVal;
-    std::strncpy(driverVersion, unknown.c_str(), ZES_STRING_PROPERTY_SIZE);
+    std::strncpy(driverVersion, unknown.data(), ZES_STRING_PROPERTY_SIZE);
     ze_result_t result = pFsAccess->read(agamaVersionFile, strVal);
     if (ZE_RESULT_SUCCESS != result) {
         if (ZE_RESULT_ERROR_NOT_AVAILABLE != result) {

level_zero/tools/source/sysman/pci/linux/os_pci_imp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -73,8 +73,8 @@ void LinuxPciImp::getMaxLinkCaps(double &maxLinkSpeed, int32_t &maxLinkWidth) {
     }
 
     uint16_t linkCaps = L0::PciUtil::getWordFromConfig(linkCapPos, configMemory.data());
-    maxLinkSpeed = convertPciGenToLinkSpeed(BITS(linkCaps, 0, 4));
-    maxLinkWidth = BITS(linkCaps, 4, 6);
+    maxLinkSpeed = convertPciGenToLinkSpeed(bits(linkCaps, 0, 4));
+    maxLinkWidth = bits(linkCaps, 4, 6);
 
     return;
 }
@@ -181,7 +181,7 @@ uint16_t LinuxPciImp::getLinkCapabilityPos(uint8_t *configMem) {
         id = L0::PciUtil::getByteFromConfig(pos + PCI_CAP_LIST_ID, configMem);
         if (id == PCI_CAP_ID_EXP) {
             capRegister = L0::PciUtil::getWordFromConfig(pos + PCI_CAP_FLAGS, configMem);
-            type = BITS(capRegister, 4, 4);
+            type = bits(capRegister, 4, 4);
 
             // Root Complex Integrated end point and
             // Root Complex Event collector will not implement link capabilities
@@ -250,11 +250,11 @@ bool LinuxPciImp::resizableBarEnabled(uint32_t barIndex) {
 
     // Only first Control register(at offset 008h, as shown above), could tell about number of resizable Bars
     controlRegister = L0::PciUtil::getDwordFromConfig(rebarCapabilityPos + PCI_REBAR_CTRL, configMemory.data());
-    nBars = BITS(controlRegister, 5, 3); // control register's bits 5,6 and 7 contain number of resizable bars information
+    nBars = bits(controlRegister, 5, 3); // control register's bits 5,6 and 7 contain number of resizable bars information
     for (auto barNumber = 0u; barNumber < nBars; barNumber++) {
         uint32_t barId = 0;
         controlRegister = L0::PciUtil::getDwordFromConfig(rebarCapabilityPos + PCI_REBAR_CTRL, configMemory.data());
-        barId = BITS(controlRegister, 0, 3); // Control register's bit 0,1,2 tells the index of bar
+        barId = bits(controlRegister, 0, 3); // Control register's bit 0,1,2 tells the index of bar
         if (barId == barIndex) {
             isBarResizable = true;
             break;
@@ -278,7 +278,7 @@ bool LinuxPciImp::resizableBarEnabled(uint32_t barIndex) {
 
     // Control register's bit 8 to 13 indicates current BAR size in encoded form.
     // Example, real value of current size could be 2^currentSize MB
-    auto currentSize = BITS(controlRegister, 8, 6);
+    auto currentSize = bits(controlRegister, 8, 6);
 
     // If current size is equal to larget possible BAR size, it indicates resizable BAR is enabled.
     return (currentSize == largestPossibleBarSize);

level_zero/tools/source/sysman/pci/pci_imp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -48,19 +48,19 @@ int64_t convertPcieSpeedFromGTsToBs(double maxLinkSpeedInGt) {
 
 double convertPciGenToLinkSpeed(uint32_t gen) {
     switch (gen) {
-    case PciGenerations::PciGen1: {
+    case static_cast<uint32_t>(PciGenerations::pciGen1): {
         return PciLinkSpeeds::pci2Dot5GigaTransfersPerSecond;
     } break;
-    case PciGenerations::PciGen2: {
+    case static_cast<uint32_t>(PciGenerations::pciGen2): {
         return PciLinkSpeeds::pci5GigaTransfersPerSecond;
     } break;
-    case PciGenerations::PciGen3: {
+    case static_cast<uint32_t>(PciGenerations::pciGen3): {
         return PciLinkSpeeds::pci8GigaTransfersPerSecond;
     } break;
-    case PciGenerations::PciGen4: {
+    case static_cast<uint32_t>(PciGenerations::pciGen4): {
         return PciLinkSpeeds::pci16GigaTransfersPerSecond;
     } break;
-    case PciGenerations::PciGen5: {
+    case static_cast<uint32_t>(PciGenerations::pciGen5): {
         return PciLinkSpeeds::pci32GigaTransfersPerSecond;
     } break;
     default: {
@@ -71,15 +71,15 @@ double convertPciGenToLinkSpeed(uint32_t gen) {
 
 int32_t convertLinkSpeedToPciGen(double speed) {
     if (speed == PciLinkSpeeds::pci2Dot5GigaTransfersPerSecond) {
-        return PciGenerations::PciGen1;
+        return static_cast<int32_t>(PciGenerations::pciGen1);
     } else if (speed == PciLinkSpeeds::pci5GigaTransfersPerSecond) {
-        return PciGenerations::PciGen2;
+        return static_cast<int32_t>(PciGenerations::pciGen2);
     } else if (speed == PciLinkSpeeds::pci8GigaTransfersPerSecond) {
-        return PciGenerations::PciGen3;
+        return static_cast<int32_t>(PciGenerations::pciGen3);
     } else if (speed == PciLinkSpeeds::pci16GigaTransfersPerSecond) {
-        return PciGenerations::PciGen4;
+        return static_cast<int32_t>(PciGenerations::pciGen4);
     } else if (speed == PciLinkSpeeds::pci32GigaTransfersPerSecond) {
-        return PciGenerations::PciGen5;
+        return static_cast<int32_t>(PciGenerations::pciGen5);
     } else {
         return -1;
     }

level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp_prelim.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2022-2023 Intel Corporation
+ * Copyright (C) 2022-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -23,7 +23,6 @@ const std::string LinuxSchedulerImp::heartbeatIntervalMilliSecs("heartbeat_inter
 const std::string LinuxSchedulerImp::defaultHeartbeatIntervalMilliSecs(".defaults/heartbeat_interval_ms");
 const std::string LinuxSchedulerImp::engineDir("engine");
 const std::string LinuxSchedulerImp::enableEuDebug("prelim_enable_eu_debug");
-constexpr uint16_t milliSecsToMicroSecs = 1000;
 
 static const std::map<__u16, std::string> i915EngineClassToSysfsEngineMap = {
     {drm_i915_gem_engine_class::I915_ENGINE_CLASS_RENDER, "rcs"},

level_zero/tools/source/sysman/sysman_const.h

@@ -7,16 +7,19 @@
 
 #pragma once
 #include <chrono>
-#include <string>
-const std::string vendorIntel("Intel(R) Corporation");
-const std::string unknown("unknown");
-const std::string intelPciId("0x8086");
-const std::string guid64BitMemoryCounters("0xb15a0ede");
-constexpr uint32_t mbpsToBytesPerSecond = 125000;
-constexpr double milliVoltsFactor = 1000.0;
-constexpr uint32_t maxRasErrorCategoryCount = 7;
-constexpr uint32_t maxRasErrorCategoryExpCount = 10;
+#include <string_view>
+
 namespace L0 {
+
+inline constexpr std::string_view vendorIntel("Intel(R) Corporation");
+inline constexpr std::string_view unknown("unknown");
+inline constexpr std::string_view intelPciId("0x8086");
+inline constexpr std::string_view guid64BitMemoryCounters("0xb15a0ede");
+inline constexpr uint32_t mbpsToBytesPerSecond = 125000;
+inline constexpr double milliVoltsFactor = 1000.0;
+inline constexpr uint32_t maxRasErrorCategoryCount = 7;
+inline constexpr uint32_t maxRasErrorCategoryExpCount = 10;
+
 struct SteadyClock {
     typedef std::chrono::duration<uint64_t, std::milli> duration;
     typedef duration::rep rep;
@@ -28,39 +31,41 @@ struct SteadyClock {
     }
 };
 
-} // namespace L0
-
 namespace PciLinkSpeeds {
-constexpr double pci2Dot5GigaTransfersPerSecond = 2.5;
-constexpr double pci5GigaTransfersPerSecond = 5.0;
-constexpr double pci8GigaTransfersPerSecond = 8.0;
-constexpr double pci16GigaTransfersPerSecond = 16.0;
-constexpr double pci32GigaTransfersPerSecond = 32.0;
+inline constexpr double pci2Dot5GigaTransfersPerSecond = 2.5;
+inline constexpr double pci5GigaTransfersPerSecond = 5.0;
+inline constexpr double pci8GigaTransfersPerSecond = 8.0;
+inline constexpr double pci16GigaTransfersPerSecond = 16.0;
+inline constexpr double pci32GigaTransfersPerSecond = 32.0;
 
 } // namespace PciLinkSpeeds
-enum PciGenerations {
-    PciGen1 = 1,
-    PciGen2,
-    PciGen3,
-    PciGen4,
-    PciGen5,
+enum class PciGenerations {
+    pciGen1 = 1,
+    pciGen2,
+    pciGen3,
+    pciGen4,
+    pciGen5,
 };
 
-constexpr uint8_t maxPciBars = 6;
+inline constexpr uint8_t maxPciBars = 6;
 // Linux kernel would report 255 link width, as an indication of unknown.
-constexpr uint32_t unknownPcieLinkWidth = 255u;
+inline constexpr uint32_t unknownPcieLinkWidth = 255u;
+
+inline constexpr uint32_t microSecondsToNanoSeconds = 1000u;
 
-constexpr uint32_t microSecondsToNanoSeconds = 1000u;
+inline constexpr uint64_t convertJouleToMicroJoule = 1000000u;
+inline constexpr uint64_t minTimeoutModeHeartbeat = 5000u;
+inline constexpr uint64_t minTimeoutInMicroSeconds = 1000u;
+inline constexpr uint16_t milliSecsToMicroSecs = 1000;
+inline constexpr uint32_t milliFactor = 1000u;
+inline constexpr uint32_t microFacor = milliFactor * milliFactor;
+inline constexpr uint64_t gigaUnitTransferToUnitTransfer = 1000 * 1000 * 1000;
 
-constexpr uint64_t convertJouleToMicroJoule = 1000000u;
-constexpr uint64_t minTimeoutModeHeartbeat = 5000u;
-constexpr uint64_t minTimeoutInMicroSeconds = 1000u;
-constexpr uint16_t milliSecsToMicroSecs = 1000;
-constexpr uint32_t milliFactor = 1000u;
-constexpr uint32_t microFacor = milliFactor * milliFactor;
-constexpr uint64_t gigaUnitTransferToUnitTransfer = 1000 * 1000 * 1000;
+inline constexpr int32_t memoryBusWidth = 128; // bus width in bytes
+inline constexpr int32_t numMemoryChannels = 8;
+inline constexpr uint32_t unknownMemoryType = UINT32_MAX;
 
-constexpr int32_t memoryBusWidth = 128; // bus width in bytes
-constexpr int32_t numMemoryChannels = 8;
-constexpr uint32_t unknownMemoryType = UINT32_MAX;
-#define BITS(x, at, width) (((x) >> (at)) & ((1 << (width)) - 1))
+inline constexpr uint32_t bits(uint32_t x, uint32_t at, uint32_t width) {
+    return (((x) >> (at)) & ((1 << (width)) - 1));
+}
+} // namespace L0

level_zero/tools/test/unit_tests/sources/sysman/memory/linux/mock_memory_prelim.h

@@ -253,7 +253,7 @@ struct MockMemoryPmt : public PlatformMonitoringTech {
     bool mockVfid1Status = false;
     bool isRepeated = false;
 
-    void setGuid(std::string guid) {
+    void setGuid(std::string_view guid) {
         this->guid = guid;
     }
 

level_zero/tools/test/unit_tests/sources/sysman/pci/linux/test_zes_pci.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -620,7 +620,7 @@ TEST_F(ZesPciFixture, GivenValidSysmanHandleWhenCallingzetSysmanPciGetStatsThenV
 }
 
 TEST_F(ZesPciFixture, WhenConvertingLinkSpeedThenResultIsCorrect) {
-    for (int32_t i = PciGenerations::PciGen1; i <= PciGenerations::PciGen5; i++) {
+    for (int32_t i = static_cast<int32_t>(PciGenerations::pciGen1); i <= static_cast<int32_t>(PciGenerations::pciGen5); i++) {
         double speed = convertPciGenToLinkSpeed(i);
         int32_t gen = convertLinkSpeedToPciGen(speed);
         EXPECT_EQ(i, gen);