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luluu9Compute-Runtime-Automation
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Compute-Runtime-Automation
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fix: align NEO code to new uAPI header
Related-To: NEO-9566 Signed-off-by: Naklicki, Mateusz <[email protected]>
1 parent a02ac1c commit dc29c08

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5 files changed

+286
-278
lines changed

5 files changed

+286
-278
lines changed

‎level_zero/sysman/source/shared/linux/sysman_kmd_interface.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -224,17 +224,17 @@ int64_t SysmanKmdInterfaceXe::getEngineActivityFd(zes_engine_group_t engineGroup
224224

225225
switch (engineGroup) {
226226
case ZES_ENGINE_GROUP_ALL:
227-
config = XE_PMU_ANY_ENGINE_GROUP_BUSY(subDeviceId);
227+
config = DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(subDeviceId);
228228
break;
229229
case ZES_ENGINE_GROUP_COMPUTE_ALL:
230230
case ZES_ENGINE_GROUP_RENDER_ALL:
231-
config = XE_PMU_RENDER_GROUP_BUSY(subDeviceId);
231+
config = DRM_XE_PMU_RENDER_GROUP_BUSY(subDeviceId);
232232
break;
233233
case ZES_ENGINE_GROUP_COPY_ALL:
234-
config = XE_PMU_COPY_GROUP_BUSY(subDeviceId);
234+
config = DRM_XE_PMU_COPY_GROUP_BUSY(subDeviceId);
235235
break;
236236
case ZES_ENGINE_GROUP_MEDIA_ALL:
237-
config = XE_PMU_MEDIA_GROUP_BUSY(subDeviceId);
237+
config = DRM_XE_PMU_MEDIA_GROUP_BUSY(subDeviceId);
238238
break;
239239
default:
240240
break;

‎shared/source/os_interface/linux/xe/ioctl_helper_xe.cpp‎

Lines changed: 56 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -86,29 +86,29 @@ const char *IoctlHelperXe::xeGetClassName(int className) {
8686

8787
const char *IoctlHelperXe::xeGetBindOperationName(int bindOperation) {
8888
switch (bindOperation) {
89-
case XE_VM_BIND_OP_MAP:
89+
case DRM_XE_VM_BIND_OP_MAP:
9090
return "MAP";
91-
case XE_VM_BIND_OP_UNMAP:
91+
case DRM_XE_VM_BIND_OP_UNMAP:
9292
return "UNMAP";
93-
case XE_VM_BIND_OP_MAP_USERPTR:
93+
case DRM_XE_VM_BIND_OP_MAP_USERPTR:
9494
return "MAP_USERPTR";
95-
case XE_VM_BIND_OP_UNMAP_ALL:
95+
case DRM_XE_VM_BIND_OP_UNMAP_ALL:
9696
return "UNMAP ALL";
97-
case XE_VM_BIND_OP_PREFETCH:
97+
case DRM_XE_VM_BIND_OP_PREFETCH:
9898
return "PREFETCH";
9999
}
100100
return "Unknown operation";
101101
}
102102

103103
const char *IoctlHelperXe::xeGetBindFlagsName(int bindFlags) {
104104
switch (bindFlags) {
105-
case XE_VM_BIND_FLAG_READONLY:
105+
case DRM_XE_VM_BIND_FLAG_READONLY:
106106
return "READ_ONLY";
107-
case XE_VM_BIND_FLAG_ASYNC:
107+
case DRM_XE_VM_BIND_FLAG_ASYNC:
108108
return "ASYNC";
109-
case XE_VM_BIND_FLAG_IMMEDIATE:
109+
case DRM_XE_VM_BIND_FLAG_IMMEDIATE:
110110
return "IMMEDIATE";
111-
case XE_VM_BIND_FLAG_NULL:
111+
case DRM_XE_VM_BIND_FLAG_NULL:
112112
return "NULL";
113113
}
114114
return "Unknown flag";
@@ -149,27 +149,27 @@ bool IoctlHelperXe::initialize() {
149149
struct drm_xe_query_config *config = reinterpret_cast<struct drm_xe_query_config *>(data.data());
150150
queryConfig.data = castToUint64(config);
151151
IoctlHelper::ioctl(DrmIoctl::Query, &queryConfig);
152-
xeLog("XE_QUERY_CONFIG_REV_AND_DEVICE_ID\t%#llx\n",
153-
config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID]);
152+
xeLog("DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID\t%#llx\n",
153+
config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID]);
154154
xeLog(" REV_ID\t\t\t\t%#llx\n",
155-
(config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
155+
(config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
156156
xeLog(" DEVICE_ID\t\t\t\t%#llx\n",
157-
config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff);
158-
xeLog("XE_QUERY_CONFIG_FLAGS\t\t\t%#llx\n",
159-
config->info[XE_QUERY_CONFIG_FLAGS]);
160-
xeLog(" XE_QUERY_CONFIG_FLAGS_HAS_VRAM\t%s\n",
161-
config->info[XE_QUERY_CONFIG_FLAGS] &
162-
XE_QUERY_CONFIG_FLAGS_HAS_VRAM
157+
config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff);
158+
xeLog("DRM_XE_QUERY_CONFIG_FLAGS\t\t\t%#llx\n",
159+
config->info[DRM_XE_QUERY_CONFIG_FLAGS]);
160+
xeLog(" DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM\t%s\n",
161+
config->info[DRM_XE_QUERY_CONFIG_FLAGS] &
162+
DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM
163163
? "ON"
164164
: "OFF");
165-
xeLog("XE_QUERY_CONFIG_MIN_ALIGNMENT\t\t%#llx\n",
166-
config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT]);
167-
xeLog("XE_QUERY_CONFIG_VA_BITS\t\t%#llx\n",
168-
config->info[XE_QUERY_CONFIG_VA_BITS]);
165+
xeLog("DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT\t\t%#llx\n",
166+
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT]);
167+
xeLog("DRM_XE_QUERY_CONFIG_VA_BITS\t\t%#llx\n",
168+
config->info[DRM_XE_QUERY_CONFIG_VA_BITS]);
169169

170-
chipsetId = config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
171-
revId = static_cast<int>((config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
172-
hasVram = config->info[XE_QUERY_CONFIG_FLAGS] & XE_QUERY_CONFIG_FLAGS_HAS_VRAM ? 1 : 0;
170+
chipsetId = config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
171+
revId = static_cast<int>((config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
172+
hasVram = config->info[DRM_XE_QUERY_CONFIG_FLAGS] & DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM ? 1 : 0;
173173

174174
memset(&queryConfig, 0, sizeof(queryConfig));
175175
queryConfig.query = DRM_XE_DEVICE_QUERY_HWCONFIG;
@@ -279,23 +279,23 @@ inline MemoryRegion createMemoryRegionFromXeMemRegion(const drm_xe_query_mem_reg
279279
}
280280

281281
std::unique_ptr<MemoryInfo> IoctlHelperXe::createMemoryInfo() {
282-
auto memUsageData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_MEM_USAGE);
282+
auto memUsageData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_MEM_REGIONS);
283283
auto gtListData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_GT_LIST);
284284

285285
if (memUsageData.empty() || gtListData.empty()) {
286286
return {};
287287
}
288288

289289
MemoryInfo::RegionContainer regionsContainer{};
290-
auto xeMemUsageData = reinterpret_cast<drm_xe_query_mem_usage *>(memUsageData.data());
290+
auto xeMemRegionsData = reinterpret_cast<drm_xe_query_mem_regions *>(memUsageData.data());
291291
auto xeGtListData = reinterpret_cast<drm_xe_query_gt_list *>(gtListData.data());
292292

293293
std::array<drm_xe_query_mem_region *, 64> memoryRegionInstances{};
294294

295-
for (auto i = 0u; i < xeMemUsageData->num_regions; i++) {
296-
auto &region = xeMemUsageData->regions[i];
295+
for (auto i = 0u; i < xeMemRegionsData->num_regions; i++) {
296+
auto &region = xeMemRegionsData->regions[i];
297297
memoryRegionInstances[region.instance] = &region;
298-
if (region.mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
298+
if (region.mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
299299
regionsContainer.push_back(createMemoryRegionFromXeMemRegion(region));
300300
}
301301
}
@@ -305,9 +305,9 @@ std::unique_ptr<MemoryInfo> IoctlHelperXe::createMemoryInfo() {
305305
}
306306

307307
for (auto i = 0u; i < xeGtListData->num_gt; i++) {
308-
if (xeGtListData->gt_list[i].type != XE_QUERY_GT_TYPE_MEDIA) {
309-
uint64_t nativeMemRegions = xeGtListData->gt_list[i].native_mem_regions;
310-
auto regionIndex = Math::log2(nativeMemRegions);
308+
if (xeGtListData->gt_list[i].type != DRM_XE_QUERY_GT_TYPE_MEDIA) {
309+
uint64_t nearMemRegions = xeGtListData->gt_list[i].near_mem_regions;
310+
auto regionIndex = Math::log2(nearMemRegions);
311311
UNRECOVERABLE_IF(!memoryRegionInstances[regionIndex]);
312312
regionsContainer.push_back(createMemoryRegionFromXeMemRegion(*memoryRegionInstances[regionIndex]));
313313
xeTimestampFrequency = xeGtListData->gt_list[i].clock_freq;
@@ -467,7 +467,7 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
467467

468468
auto tileIndex = 0u;
469469
for (auto gt = 0u; gt < gtIdToTile.size(); gt++) {
470-
if (xeGtListData->gt_list[gt].type != XE_QUERY_GT_TYPE_MEDIA) {
470+
if (xeGtListData->gt_list[gt].type != DRM_XE_QUERY_GT_TYPE_MEDIA) {
471471
gtIdToTile[gt] = tileIndex++;
472472
}
473473
}
@@ -481,15 +481,15 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
481481

482482
uint32_t gtId = topo->gt_id;
483483

484-
if (xeGtListData->gt_list[gtId].type != XE_QUERY_GT_TYPE_MEDIA) {
484+
if (xeGtListData->gt_list[gtId].type != DRM_XE_QUERY_GT_TYPE_MEDIA) {
485485
switch (topo->type) {
486-
case XE_TOPO_DSS_GEOMETRY:
486+
case DRM_XE_TOPO_DSS_GEOMETRY:
487487
fillMask(geomDss[gtIdToTile[gtId]], topo);
488488
break;
489-
case XE_TOPO_DSS_COMPUTE:
489+
case DRM_XE_TOPO_DSS_COMPUTE:
490490
fillMask(computeDss[gtIdToTile[gtId]], topo);
491491
break;
492-
case XE_TOPO_EU_PER_DSS:
492+
case DRM_XE_TOPO_EU_PER_DSS:
493493
fillMask(euDss[gtIdToTile[gtId]], topo);
494494
break;
495495
default:
@@ -612,7 +612,7 @@ int IoctlHelperXe::xeWaitUserFence(uint64_t mask, uint16_t op, uint64_t addr, ui
612612
struct drm_xe_wait_user_fence wait = {};
613613
wait.addr = addr;
614614
wait.op = op;
615-
wait.flags = DRM_XE_UFENCE_WAIT_SOFT_OP;
615+
wait.flags = DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
616616
wait.value = value;
617617
wait.mask = mask;
618618
wait.timeout = timeout;
@@ -630,24 +630,24 @@ int IoctlHelperXe::waitUserFence(uint32_t ctxId, uint64_t address,
630630
uint64_t mask;
631631
switch (dataWidth) {
632632
case static_cast<uint32_t>(Drm::ValueWidth::U64):
633-
mask = DRM_XE_UFENCE_WAIT_U64;
633+
mask = DRM_XE_UFENCE_WAIT_MASK_U64;
634634
break;
635635
case static_cast<uint32_t>(Drm::ValueWidth::U32):
636-
mask = DRM_XE_UFENCE_WAIT_U32;
636+
mask = DRM_XE_UFENCE_WAIT_MASK_U32;
637637
break;
638638
case static_cast<uint32_t>(Drm::ValueWidth::U16):
639-
mask = DRM_XE_UFENCE_WAIT_U16;
639+
mask = DRM_XE_UFENCE_WAIT_MASK_U16;
640640
break;
641641
default:
642-
mask = DRM_XE_UFENCE_WAIT_U8;
642+
mask = DRM_XE_UFENCE_WAIT_MASK_U8;
643643
break;
644644
}
645645
if (timeout == -1) {
646646
/* expected in i915 but not in xe where timeout is an unsigned long */
647647
timeout = TimeoutControls::maxTimeout;
648648
}
649649
if (address) {
650-
return xeWaitUserFence(mask, DRM_XE_UFENCE_WAIT_GTE, address, value, timeout);
650+
return xeWaitUserFence(mask, DRM_XE_UFENCE_WAIT_OP_GTE, address, value, timeout);
651651
}
652652
return 0;
653653
}
@@ -714,7 +714,7 @@ int IoctlHelperXe::execBuffer(ExecBuffer *execBuffer, uint64_t completionGpuAddr
714714
completionGpuAddress, counterValue, engine);
715715

716716
struct drm_xe_sync sync[1] = {};
717-
sync[0].flags = DRM_XE_SYNC_USER_FENCE | DRM_XE_SYNC_SIGNAL;
717+
sync[0].flags = DRM_XE_SYNC_FLAG_USER_FENCE | DRM_XE_SYNC_FLAG_SIGNAL;
718718
sync[0].addr = completionGpuAddress;
719719
sync[0].timeline_value = counterValue;
720720
struct drm_xe_exec exec = {};
@@ -883,9 +883,9 @@ int IoctlHelperXe::getDrmParamValue(DrmParam drmParam) const {
883883

884884
switch (drmParam) {
885885
case DrmParam::MemoryClassDevice:
886-
return XE_MEM_REGION_CLASS_VRAM;
886+
return DRM_XE_MEM_REGION_CLASS_VRAM;
887887
case DrmParam::MemoryClassSystem:
888-
return XE_MEM_REGION_CLASS_SYSMEM;
888+
return DRM_XE_MEM_REGION_CLASS_SYSMEM;
889889
case DrmParam::EngineClassRender:
890890
return DRM_XE_ENGINE_CLASS_RENDER;
891891
case DrmParam::EngineClassCopy:
@@ -1067,10 +1067,10 @@ int IoctlHelperXe::ioctl(DrmIoctl request, void *arg) {
10671067
case DrmIoctl::GemVmCreate: {
10681068
GemVmControl *d = static_cast<GemVmControl *>(arg);
10691069
struct drm_xe_vm_create args = {};
1070-
args.flags = DRM_XE_VM_CREATE_ASYNC_DEFAULT |
1071-
DRM_XE_VM_CREATE_COMPUTE_MODE;
1070+
args.flags = DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT |
1071+
DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE;
10721072
if (drm.hasPageFaultSupport()) {
1073-
args.flags |= DRM_XE_VM_CREATE_FAULT_MODE;
1073+
args.flags |= DRM_XE_VM_CREATE_FLAG_FAULT_MODE;
10741074
}
10751075
ret = IoctlHelper::ioctl(request, &args);
10761076
d->vmId = ret ? 0 : args.vm_id;
@@ -1238,7 +1238,7 @@ int IoctlHelperXe::xeVmBind(const VmBindParams &vmBindParams, bool isBind) {
12381238
if (index != invalidIndex) {
12391239

12401240
drm_xe_sync sync[1] = {};
1241-
sync[0].flags = DRM_XE_SYNC_USER_FENCE | DRM_XE_SYNC_SIGNAL;
1241+
sync[0].flags = DRM_XE_SYNC_FLAG_USER_FENCE | DRM_XE_SYNC_FLAG_SIGNAL;
12421242
auto xeBindExtUserFence = reinterpret_cast<UserFenceExtension *>(vmBindParams.extensions);
12431243
UNRECOVERABLE_IF(!xeBindExtUserFence);
12441244
UNRECOVERABLE_IF(xeBindExtUserFence->tag != UserFenceExtension::tagValue);
@@ -1252,19 +1252,19 @@ int IoctlHelperXe::xeVmBind(const VmBindParams &vmBindParams, bool isBind) {
12521252
bind.syncs = reinterpret_cast<uintptr_t>(&sync);
12531253
bind.bind.range = vmBindParams.length;
12541254
bind.bind.addr = gmmHelper->decanonize(vmBindParams.start);
1255-
bind.bind.flags = XE_VM_BIND_FLAG_ASYNC;
1255+
bind.bind.flags = DRM_XE_VM_BIND_FLAG_ASYNC;
12561256
bind.bind.obj_offset = vmBindParams.offset;
12571257

12581258
if (isBind) {
1259-
bind.bind.op = XE_VM_BIND_OP_MAP;
1259+
bind.bind.op = DRM_XE_VM_BIND_OP_MAP;
12601260
bind.bind.obj = vmBindParams.handle;
12611261
if (bindInfo[index].handle & XE_USERPTR_FAKE_FLAG) {
1262-
bind.bind.op = XE_VM_BIND_OP_MAP_USERPTR;
1262+
bind.bind.op = DRM_XE_VM_BIND_OP_MAP_USERPTR;
12631263
bind.bind.obj = 0;
12641264
bind.bind.obj_offset = bindInfo[index].userptr;
12651265
}
12661266
} else {
1267-
bind.bind.op = XE_VM_BIND_OP_UNMAP;
1267+
bind.bind.op = DRM_XE_VM_BIND_OP_UNMAP;
12681268
bind.bind.obj = 0;
12691269
if (bindInfo[index].handle & XE_USERPTR_FAKE_FLAG) {
12701270
bind.bind.obj_offset = bindInfo[index].userptr;
@@ -1293,7 +1293,7 @@ int IoctlHelperXe::xeVmBind(const VmBindParams &vmBindParams, bool isBind) {
12931293
return ret;
12941294
}
12951295

1296-
return xeWaitUserFence(DRM_XE_UFENCE_WAIT_U64, DRM_XE_UFENCE_WAIT_EQ,
1296+
return xeWaitUserFence(DRM_XE_UFENCE_WAIT_MASK_U64, DRM_XE_UFENCE_WAIT_OP_EQ,
12971297
sync[0].addr,
12981298
sync[0].timeline_value, XE_ONE_SEC);
12991299
}

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