fix compilation with clang 9

ci: add build with clang on Arch

Signed-off-by: Jacek Danecki <[email protected]>

#241

Change-Id: I1a8620c9f8146e7108098d18e9db75b9ff178f44

Author: JacekDanecki

core/helpers/preamble.h

@@ -80,12 +80,13 @@ struct L3CNTLRegisterOffset {
     static const uint32_t registerOffset;
 };
 
-namespace DebugModeRegisterOffset {
 template <typename GfxFamily>
-constexpr uint32_t registerOffset = 0x20ec;
-template <typename GfxFamily>
-constexpr uint32_t debugEnabledValue = (1 << 6) | (1 << 22);
-}; // namespace DebugModeRegisterOffset
+struct DebugModeRegisterOffset {
+    enum {
+        registerOffset = 0x20ec,
+        debugEnabledValue = (1 << 6) | (1 << 22)
+    };
+};
 
 namespace TdDebugControlRegisterOffset {
 static constexpr uint32_t registerOffset = 0xe400;

core/helpers/preamble_base.inl

@@ -89,8 +89,8 @@ template <typename GfxFamily>
 void PreambleHelper<GfxFamily>::programKernelDebugging(LinearStream *pCommandStream) {
     auto pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(pCommandStream->getSpace(sizeof(MI_LOAD_REGISTER_IMM)));
     *pCmd = GfxFamily::cmdInitLoadRegisterImm;
-    pCmd->setRegisterOffset(DebugModeRegisterOffset::registerOffset<GfxFamily>);
-    pCmd->setDataDword(DebugModeRegisterOffset::debugEnabledValue<GfxFamily>);
+    pCmd->setRegisterOffset(DebugModeRegisterOffset<GfxFamily>::registerOffset);
+    pCmd->setDataDword(DebugModeRegisterOffset<GfxFamily>::debugEnabledValue);
 
     auto pCmd2 = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(pCommandStream->getSpace(sizeof(MI_LOAD_REGISTER_IMM)));
     *pCmd2 = GfxFamily::cmdInitLoadRegisterImm;

core/unit_tests/preamble/preamble_tests.cpp

@@ -121,8 +121,8 @@ HWTEST_F(PreambleTest, whenKernelDebuggingCommandsAreProgrammedThenCorrectComman
     auto it = cmdList.begin();
 
     MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
-    EXPECT_EQ(DebugModeRegisterOffset::registerOffset<FamilyType>, pCmd->getRegisterOffset());
-    EXPECT_EQ(DebugModeRegisterOffset::debugEnabledValue<FamilyType>, pCmd->getDataDword());
+    EXPECT_EQ(DebugModeRegisterOffset<FamilyType>::registerOffset, pCmd->getRegisterOffset());
+    EXPECT_EQ(DebugModeRegisterOffset<FamilyType>::debugEnabledValue, pCmd->getDataDword());
     it++;
 
     pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);

runtime/gen11/reg_configs.h

@@ -23,12 +23,13 @@ struct L3CNTLRegisterOffset<ICLFamily> {
     static const uint32_t registerOffset = 0x7034;
 };
 
-namespace DebugModeRegisterOffset {
 template <>
-constexpr uint32_t registerOffset<ICLFamily> = 0x20d8;
-template <>
-constexpr uint32_t debugEnabledValue<ICLFamily> = (1 << 5) | (1 << 21);
-}; // namespace DebugModeRegisterOffset
+struct DebugModeRegisterOffset<ICLFamily> {
+    enum {
+        registerOffset = 0x20d8,
+        debugEnabledValue = (1 << 5) | (1 << 21)
+    };
+};
 
 namespace gen11HdcModeRegister {
 const uint32_t address = 0xE5F4;

scripts/build-arch-clang.sh

@@ -0,0 +1,11 @@
+#!/bin/bash
+#
+# Copyright (C) 2018-2019 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+git fetch -t
+git clone ../compute-runtime neo
+docker build -f scripts/docker/Dockerfile-arch-clang -t neo-arch-clang:ci .
+

scripts/docker/Dockerfile-arch-clang

@@ -0,0 +1,12 @@
+FROM docker.io/archlinux/base
+MAINTAINER Jacek Danecki <[email protected]>
+
+COPY neo /root/neo
+COPY scripts/prepare-arch-clang.sh /root
+
+RUN /root/prepare-arch-clang.sh
+RUN cd /root/build ; cmake -G Ninja -DCMAKE_BUILD_TYPE=Release \
+    -DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++ \
+    -DDO_NOT_RUN_AUB_TESTS=1 ../neo ; \
+    ninja -j `nproc`
+CMD ["/bin/bash"]

scripts/prepare-arch-clang.sh

@@ -0,0 +1,14 @@
+#!/bin/bash
+#
+# Copyright (C) 2018-2019 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set -e
+set -x
+
+mkdir /root/build
+pacman -Suy --noconfirm clang cmake git make pkg-config ninja libva \
+        intel-gmmlib intel-opencl-clang spirv-llvm-translator intel-graphics-compiler
+