Skip to content

Actions: intel/intel-graphics-compiler

Actions

All workflows

Actions

Loading...
Loading

Showing runs from all workflows
177 workflow run results
177 workflow run results

Filter by Event

Filter by Status

Filter by Branch

Filter by Actor

Stale Pull Requests Stale Pull Requests #23: Scheduled
1d 14h 30m 27s master
master
1d 14h 30m 27s
CMABI pointer to vector argument fix Build IGC #6067: Commit 432b36a pushed by VPG-SWE-Github
32m 16s master
master
32m 16s
Add a compiler option for cost model Build IGC #6066: Commit a6e0bb1 pushed by VPG-SWE-Github
32m 3s master
master
32m 3s
Fold chains of boolean shufflevector instructions Build IGC #6065: Commit 107f249 pushed by VPG-SWE-Github
31m 42s master
master
31m 42s
Fix typo in uchar32 type definition in BiFModule Build IGC #6064: Commit 8f5a5df pushed by VPG-SWE-Github
30m 31s master
master
30m 31s
[LLVM16] Introduce LLVM API/IR wrapper for memory attributes Build IGC #6063: Commit 1d2335c pushed by VPG-SWE-Github
32m 0s master
master
32m 0s
Fix bindless buffer payload arguments in VC Build IGC #6062: Commit b1ae909 pushed by VPG-SWE-Github
32m 0s master
master
32m 0s
Use dynamic address register instead of a0.2 as extend message descr… Build IGC #6061: Commit 94e557a pushed by VPG-SWE-Github
31m 27s master
master
31m 27s
Stale Pull Requests Stale Pull Requests #22: Scheduled
1d 14h 30m 37s master
master
1d 14h 30m 37s
BCR for 5 source DPAS Build IGC #6060: Commit 81902ab pushed by VPG-SWE-Github
32m 4s master
master
32m 4s
Add WAR dependence for A0 register Build IGC #6059: Commit c647701 pushed by VPG-SWE-Github
33m 35s master
master
33m 35s
Legalization pass tests update Build IGC #6058: Commit e644b18 pushed by VPG-SWE-Github
32m 54s master
master
32m 54s
Debug info implementation to support subroutines Build IGC #6057: Commit c939687 pushed by VPG-SWE-Github
33m 57s master
master
33m 57s
Fix LegalizationPass regression Build IGC #6056: Commit 7803857 pushed by VPG-SWE-Github
32m 29s master
master
32m 29s
Init address register to avoid unaligned cross grf access Build IGC #6055: Commit ddab4d1 pushed by VPG-SWE-Github
36m 55s master
master
36m 55s
Add option to specify file for SelectiveFunctionControl Build IGC #6054: Commit 829f4f2 pushed by VPG-SWE-Github
32m 31s master
master
32m 31s
Stale Pull Requests Stale Pull Requests #21: Scheduled
1d 14h 24m 39s master
master
1d 14h 24m 39s
Implement helper SeparateSpillAndScratch() Build IGC #6053: Commit 8e274ad pushed by VPG-SWE-Github
32m 9s master
master
32m 9s
Mark TimeStatsCounter pass as not changing IR. Build IGC #6052: Commit 497e384 pushed by VPG-SWE-Github
31m 55s master
master
31m 55s
Remove spirv support for float AtomicCompareExchange Build IGC #6051: Commit 3fcd584 pushed by VPG-SWE-Github
32m 5s master
master
32m 5s
Changes in code. Build IGC #6050: Commit c484b86 pushed by VPG-SWE-Github
32m 52s master
master
32m 52s
Stale Pull Requests Stale Pull Requests #20: Scheduled
1d 14h 28m 12s master
master
1d 14h 28m 12s
Stale Pull Requests Stale Pull Requests #19: Scheduled
1d 14h 26m 20s master
master
1d 14h 26m 20s
Stale Pull Requests Stale Pull Requests #18: Scheduled
1d 14h 31m 8s master
master
1d 14h 31m 8s
Improve vISA APIs to support general nbarrier Build IGC #6049: Commit 65ecf85 pushed by VPG-SWE-Github
29m 13s master
master
29m 13s