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[Autobackout][FunctionalRegression]Revert of change: 34c8a74da1678c18… Build IGC #6757: Commit b47c009 pushed by VPG-SWE-Github
30m 53s master
master
30m 53s
Stale Pull Requests Stale Pull Requests #178: Scheduled
1d 0h 0m 2s master
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1d 0h 0m 2s
small refactor Build IGC #6756: Commit c2dc740 pushed by VPG-SWE-Github
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31m 29s
Changes in code. Build IGC #6755: Commit 0b83cd4 pushed by VPG-SWE-Github
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[Autobackout][FunctionalRegression]Revert of change: c8f842452cbd22cb… Build IGC #6754: Commit 64b7d14 pushed by VPG-SWE-Github
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Fix BackendConfig propagation Build IGC #6753: Commit ebd4101 pushed by VPG-SWE-Github
30m 42s master
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30m 42s
Minor refactor Build IGC #6752: Commit 472ce39 pushed by VPG-SWE-Github
24s master
master
24s
Fixing ConstantCoalescing optimiztion Build IGC #6751: Commit effbb0f pushed by VPG-SWE-Github
30m 34s master
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Promote insertelement and extractelement in PromoteBools Build IGC #6750: Commit c8f8424 pushed by VPG-SWE-Github
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Remove implicit memory fence when raster order views are used Build IGC #6749: Commit fe2a7ae pushed by VPG-SWE-Github
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Generic changes Build IGC #6748: Commit 59e2b65 pushed by VPG-SWE-Github
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Call getFirstLaneID once for all in resource loop unroll Build IGC #6747: Commit 824599c pushed by VPG-SWE-Github
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Stale Pull Requests Stale Pull Requests #177: Scheduled
1d 14h 27m 51s master
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1d 14h 27m 51s
Fix rdregion whose width crosses register boundary in VC Build IGC #6746: Commit 2983026 pushed by VPG-SWE-Github
31m 17s master
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Initialize variables. Reduce copying. Promote types. Build IGC #6745: Commit 9c8de86 pushed by VPG-SWE-Github
30m 44s master
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Generic changes Build IGC #6744: Commit b15ef7b pushed by VPG-SWE-Github
31m 8s master
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Set the max sub slices value correctly in SIP Build IGC #6743: Commit 0c59754 pushed by VPG-SWE-Github
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small refactor Build IGC #6742: Commit 367c2bd pushed by VPG-SWE-Github
31m 44s master
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31m 44s
Stale Pull Requests Stale Pull Requests #176: Scheduled
1d 14h 28m 0s master
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1d 14h 28m 0s
LNV bug fix Build IGC #6741: Commit b5d8422 pushed by VPG-SWE-Github
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Add missed llvm-14 pipeline passes Build IGC #6740: Commit 8acb1ca pushed by VPG-SWE-Github
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Consider shader private memory when calculating scratch offset for g… Build IGC #6739: Commit 603021d pushed by VPG-SWE-Github
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Xe2 Sip, Update execution mask to 32 bit Build IGC #6738: Commit 7769db0 pushed by VPG-SWE-Github
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Fix copying uniform variables Build IGC #6737: Commit 5d742f7 pushed by VPG-SWE-Github
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Adjust number of pushed inputs if number of GRFs is forced Build IGC #6736: Commit e56ec07 pushed by VPG-SWE-Github
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