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igorban-intel
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Support for creating a target-machine in plugin
.
1 parent c1dbb2b commit 02a96db

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18 files changed

+167
-94
lines changed

18 files changed

+167
-94
lines changed

‎IGC/VectorCompiler/include/GenXPassRegistry.def‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,5 +41,6 @@ FUNCTION_PASS("CMLowerVLoadVStore", CMLowerVLoadVStorePass())
4141
FUNCTION_PASS("GenXTypeLegalization", GenXTypeLegalizationPass())
4242
FUNCTION_PASS("GenXTranslateIntrinsics", GenXTranslateIntrinsicsPass())
4343
FUNCTION_PASS("GenXLowerAggrCopies", GenXLowerAggrCopiesPass())
44+
FUNCTION_PASS("GenXRegionCollapsing", GenXRegionCollapsingPass(TM))
4445

4546
#undef FUNCTION_PASS

‎IGC/VectorCompiler/include/vc/Driver/Driver.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ SPDX-License-Identifier: MIT
88

99
#pragma once
1010

11+
#include "llvmWrapper/ADT/Optional.h"
1112
#include "vc/GenXCodeGen/GenXOCLRuntimeInfo.h"
1213
#include "vc/Support/BackendConfig.h"
1314
#include "vc/Support/ShaderDump.h"
@@ -92,8 +93,8 @@ struct CompileOptions {
9293
OptimizerLevel IROptLevel = OptimizerLevel::Full;
9394
OptimizerLevel CodegenOptLevel = OptimizerLevel::Full;
9495

95-
llvm::Optional<unsigned> StackMemSize;
96-
llvm::Optional<unsigned> GRFSize;
96+
IGCLLVM::optional<unsigned> StackMemSize;
97+
IGCLLVM::optional<unsigned> GRFSize;
9798

9899
bool EnableAutoLargeGRF = false;
99100

‎IGC/VectorCompiler/include/vc/GenXCodeGen/GenXRegionCollapsing.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,13 @@ SPDX-License-Identifier: MIT
1010

1111
namespace llvm {
1212
void initializeGenXRegionCollapsingPass(PassRegistry &);
13+
class GenXSubtarget;
1314
}
1415

1516
struct GenXRegionCollapsingPass
1617
: public llvm::PassInfoMixin<GenXRegionCollapsingPass> {
18+
const llvm::TargetMachine *TM;
19+
explicit GenXRegionCollapsingPass(const llvm::TargetMachine *TM) : TM(TM){};
1720
llvm::PreservedAnalyses run(llvm::Function &F,
1821
llvm::FunctionAnalysisManager &AM);
1922
};

‎IGC/VectorCompiler/include/vc/GenXCodeGen/TargetMachine.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ SPDX-License-Identifier: MIT
99
#ifndef VC_LIB_GENXCODEGEN_TARGETMACHINE_H
1010
#define VC_LIB_GENXCODEGEN_TARGETMACHINE_H
1111

12+
#include "llvmWrapper/ADT/Optional.h"
1213
#include "llvmWrapper/Support/TargetRegistry.h"
1314

1415
#include "vc/Support/BackendConfig.h"
@@ -18,8 +19,8 @@ namespace vc {
1819
std::unique_ptr<llvm::TargetMachine> createGenXTargetMachine(
1920
const llvm::Target &T, llvm::Triple TT, llvm::StringRef CPU,
2021
llvm::StringRef Features, const llvm::TargetOptions &Options,
21-
llvm::Optional<llvm::Reloc::Model> RM,
22-
llvm::Optional<llvm::CodeModel::Model> CM, llvm::CodeGenOpt::Level OL,
22+
IGCLLVM::optional<llvm::Reloc::Model> RM,
23+
IGCLLVM::optional<llvm::CodeModel::Model> CM, llvm::CodeGenOpt::Level OL,
2324
std::unique_ptr<llvm::GenXBackendConfig> BC);
2425

2526
inline bool is32BitArch(llvm::Triple TT) {

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXRegionCollapsing.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ GenXRegionCollapsingPass::run(Function &F, FunctionAnalysisManager &AM) {
120120
return PreservedAnalyses::none();
121121
return PreservedAnalyses::all();
122122
}
123-
#endif
123+
#endif // LLVM_VERSION_MAJOR >= 16
124124
INITIALIZE_PASS_BEGIN(GenXRegionCollapsing, "GenXRegionCollapsing",
125125
"GenXRegionCollapsing", false, false)
126126
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXTargetMachine.cpp‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -408,14 +408,14 @@ static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
408408
GenXTargetMachine::GenXTargetMachine(const Target &T, const Triple &TT,
409409
StringRef CPU, StringRef FS,
410410
const TargetOptions &Options,
411-
llvm::Optional<Reloc::Model> RM,
412-
llvm::Optional<CodeModel::Model> CM,
411+
IGCLLVM::optional<Reloc::Model> RM,
412+
IGCLLVM::optional<CodeModel::Model> CM,
413413
CodeGenOpt::Level OL, bool Is64Bit,
414414
std::unique_ptr<GenXBackendConfig> BC)
415-
: IGCLLVM::LLVMTargetMachine(T, getDL(Is64Bit), TT, CPU, FS, Options,
416-
RM ? IGCLLVM::makeOptional(RM).value() : Reloc::Model::Static,
417-
CM ? IGCLLVM::makeOptional(CM).value() : CodeModel::Model::Small,
418-
OL),
415+
: IGCLLVM::LLVMTargetMachine(
416+
T, getDL(Is64Bit), TT, CPU, FS, Options,
417+
RM ? IGCLLVM::getValue(RM) : Reloc::Model::Static,
418+
CM ? IGCLLVM::getValue(CM) : CodeModel::Model::Small, OL),
419419
TLOF(createTLOF(getTargetTriple())), BC(std::move(BC)), Is64Bit(Is64Bit),
420420
Subtarget(TT, CPU.str(), FS.str()) {}
421421

@@ -433,8 +433,8 @@ TargetPassConfig *GenXTargetMachine::createPassConfig(PassManagerBase &PM) {
433433
GenXTargetMachine32::GenXTargetMachine32(const Target &T, const Triple &TT,
434434
StringRef CPU, StringRef FS,
435435
const TargetOptions &Options,
436-
llvm::Optional<Reloc::Model> RM,
437-
llvm::Optional<CodeModel::Model> CM,
436+
IGCLLVM::optional<Reloc::Model> RM,
437+
IGCLLVM::optional<CodeModel::Model> CM,
438438
CodeGenOpt::Level OL, bool JIT,
439439
std::unique_ptr<GenXBackendConfig> BC)
440440
: GenXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false,
@@ -443,20 +443,19 @@ GenXTargetMachine32::GenXTargetMachine32(const Target &T, const Triple &TT,
443443
GenXTargetMachine64::GenXTargetMachine64(const Target &T, const Triple &TT,
444444
StringRef CPU, StringRef FS,
445445
const TargetOptions &Options,
446-
llvm::Optional<Reloc::Model> RM,
447-
llvm::Optional<CodeModel::Model> CM,
446+
IGCLLVM::optional<Reloc::Model> RM,
447+
IGCLLVM::optional<CodeModel::Model> CM,
448448
CodeGenOpt::Level OL, bool JIT,
449449
std::unique_ptr<GenXBackendConfig> BC)
450450
: GenXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true,
451451
std::move(BC)) {}
452452

453453
namespace vc {
454-
std::unique_ptr<llvm::TargetMachine>
455-
createGenXTargetMachine(const Target &T, Triple TT, StringRef CPU,
456-
StringRef Features, const TargetOptions &Options,
457-
llvm::Optional<Reloc::Model> RM,
458-
llvm::Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
459-
std::unique_ptr<GenXBackendConfig> BC) {
454+
std::unique_ptr<llvm::TargetMachine> createGenXTargetMachine(
455+
const Target &T, Triple TT, StringRef CPU, StringRef Features,
456+
const TargetOptions &Options, IGCLLVM::optional<Reloc::Model> RM,
457+
IGCLLVM::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
458+
std::unique_ptr<GenXBackendConfig> BC) {
460459
if (is32BitArch(TT))
461460
return std::make_unique<GenXTargetMachine32>(T, TT, CPU, Features, Options,
462461
RM, CM, OL, false /*JIT*/,
@@ -1149,7 +1148,8 @@ void GenXTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
11491148
PM.addPass(createModuleToFunctionPassAdaptor(InstCombinePass()));
11501149

11511150
// Simplify region accesses.
1152-
PM.addPass(createModuleToFunctionPassAdaptor(GenXRegionCollapsingPass()));
1151+
PM.addPass(
1152+
createModuleToFunctionPassAdaptor(GenXRegionCollapsingPass(this)));
11531153
PM.addPass(createModuleToFunctionPassAdaptor(EarlyCSEPass(true)));
11541154
PM.addPass(createModuleToFunctionPassAdaptor(DCEPass()));
11551155
// }

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXTargetMachine.h‎

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,14 +49,16 @@ class GenXTargetMachine : public IGCLLVM::LLVMTargetMachine {
4949
public:
5050
GenXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
5151
StringRef FS, const TargetOptions &Options,
52-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
52+
IGCLLVM::optional<Reloc::Model> RM,
53+
IGCLLVM::optional<CodeModel::Model> CM,
5354
CodeGenOpt::Level OL, bool Is64Bit)
5455
: GenXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, Is64Bit,
5556
std::make_unique<GenXBackendConfig>()) {}
5657

5758
GenXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
5859
StringRef FS, const TargetOptions &Options,
59-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
60+
IGCLLVM::optional<Reloc::Model> RM,
61+
IGCLLVM::optional<CodeModel::Model> CM,
6062
CodeGenOpt::Level OL, bool Is64Bit,
6163
std::unique_ptr<GenXBackendConfig> BC);
6264

@@ -93,14 +95,16 @@ class GenXTargetMachine32 : public GenXTargetMachine {
9395
public:
9496
GenXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
9597
StringRef FS, const TargetOptions &Options,
96-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
98+
IGCLLVM::optional<Reloc::Model> RM,
99+
IGCLLVM::optional<CodeModel::Model> CM,
97100
CodeGenOpt::Level OL, bool JIT)
98101
: GenXTargetMachine32(T, TT, CPU, FS, Options, RM, CM, OL, JIT,
99102
std::make_unique<GenXBackendConfig>()) {}
100103

101104
GenXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
102105
StringRef FS, const TargetOptions &Options,
103-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
106+
IGCLLVM::optional<Reloc::Model> RM,
107+
IGCLLVM::optional<CodeModel::Model> CM,
104108
CodeGenOpt::Level OL, bool JIT,
105109
std::unique_ptr<GenXBackendConfig> BC);
106110
};
@@ -109,14 +113,16 @@ class GenXTargetMachine64 : public GenXTargetMachine {
109113
public:
110114
GenXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
111115
StringRef FS, const TargetOptions &Options,
112-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
116+
IGCLLVM::optional<Reloc::Model> RM,
117+
IGCLLVM::optional<CodeModel::Model> CM,
113118
CodeGenOpt::Level OL, bool JIT)
114119
: GenXTargetMachine64(T, TT, CPU, FS, Options, RM, CM, OL, JIT,
115120
std::make_unique<GenXBackendConfig>()) {}
116121

117122
GenXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
118123
StringRef FS, const TargetOptions &Options,
119-
llvm::Optional<Reloc::Model> RM, llvm::Optional<CodeModel::Model> CM,
124+
IGCLLVM::optional<Reloc::Model> RM,
125+
IGCLLVM::optional<CodeModel::Model> CM,
120126
CodeGenOpt::Level OL, bool JIT,
121127
std::unique_ptr<GenXBackendConfig> BC);
122128
};

‎IGC/VectorCompiler/lib/PassPluginLibrary/CMakeLists.txt‎

Lines changed: 28 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -17,26 +17,36 @@ endif()
1717
# TODO: Fix ext
1818
set(LLVM_PLUGIN_EXT ".so")
1919

20-
add_llvm_library(
21-
NewPMPlugin
22-
COMPONENT_LIB
23-
Plugin.cpp
24-
25-
$<TARGET_OBJECTS:VCCodeGen>
26-
$<TARGET_OBJECTS:VCSupport>
27-
$<TARGET_OBJECTS:LLVMGenXIntrinsics>
28-
$<TARGET_OBJECTS:VCGenXUtils>
29-
$<TARGET_OBJECTS:VCTransforms>
30-
$<TARGET_OBJECTS:VCGeneralUtils>
31-
$<TARGET_OBJECTS:VCInternalIntrinsics>
32-
$<TARGET_OBJECTS:${IGC_BUILD__PROJ__BiFManager}>
33-
$<TARGET_OBJECTS:${IGC_BUILD__PROJ__BiFLib_OCL}>
20+
add_llvm_library(NewPMPlugin
21+
COMPONENT_LIB Plugin.cpp
3422
MODULE
3523
PLUGIN_TOOL opt
36-
)
24+
)
25+
26+
target_link_libraries(NewPMPlugin
27+
PRIVATE
28+
VCCodeGen
29+
"${IGC_BUILD__WHOLE_ARCHIVE}"
30+
"${IGC_BUILD__PROJ__BiFLib_OCL}"
31+
"${IGC_BUILD__NO_WHOLE_ARCHIVE}"
32+
)
33+
34+
set(VCLinkBEPluginScript
35+
${CMAKE_CURRENT_SOURCE_DIR}/../BackendPlugin/LinkBackendPlugin.py
36+
)
37+
38+
set_target_properties(NewPMPlugin
39+
PROPERTIES
40+
LINK_DEPENDS ${VCLinkBEPluginScript}
41+
)
42+
43+
set_target_properties(NewPMPlugin
44+
PROPERTIES
45+
RULE_LAUNCH_LINK "${PYTHON_EXECUTABLE} ${VCLinkBEPluginScript}"
46+
)
3747

38-
# TODO: Fix path
3948
target_include_directories(NewPMPlugin
4049
PRIVATE
41-
"${CMAKE_CURRENT_SOURCE_DIR}/../../include/"
42-
)
50+
"${CMAKE_CURRENT_SOURCE_DIR}/../GenXCodeGen/"
51+
"${CMAKE_CURRENT_BINARY_DIR}/../../lib/GenXCodeGen/"
52+
)

‎IGC/VectorCompiler/lib/PassPluginLibrary/Plugin.cpp‎

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,26 +6,68 @@ SPDX-License-Identifier: MIT
66
77
============================= end_copyright_notice ===========================*/
88

9+
#include "llvm/ADT/Triple.h"
10+
#include "llvm/CodeGen/CommandFlags.h"
911
#include "llvm/Passes/PassBuilder.h"
1012
#include "llvm/Passes/PassPlugin.h"
13+
#include "llvm/Target/TargetOptions.h"
1114

1215
#include "vc/GenXCodeGen/GenXLowerAggrCopies.h"
1316
#include "vc/GenXCodeGen/GenXVerify.h"
1417
#include "vc/GenXOpts/GenXOptsNewPM.h"
1518
#include "vc/Support/BackendConfig.h"
1619

20+
#include "vc/GenXCodeGen/GenXRegionCollapsing.h"
21+
#include "vc/GenXCodeGen/GenXTarget.h"
22+
#include "vc/GenXCodeGen/TargetMachine.h"
23+
24+
#include "GenXTargetMachine.h"
25+
1726
using namespace llvm;
1827

1928
namespace {
29+
30+
static TargetMachine *GetTargetMachine(Triple TheTriple, StringRef CPUStr,
31+
StringRef FeaturesStr,
32+
const TargetOptions &Options) {
33+
std::string Error;
34+
const Target *TheTarget =
35+
TargetRegistry::lookupTarget(codegen::getMArch(), TheTriple, Error);
36+
// Some modules don't specify a triple, and this is okay.
37+
if (!TheTarget) {
38+
llvm::errs() << Error << "\n";
39+
return nullptr;
40+
}
41+
42+
return TheTarget->createTargetMachine(
43+
TheTriple.getTriple(), codegen::getCPUStr(), codegen::getFeaturesStr(),
44+
Options, codegen::getExplicitRelocModel(),
45+
codegen::getExplicitCodeModel(), CodeGenOpt::Default);
46+
}
47+
2048
void registerPluginPasses(PassBuilder &PB) {
2149

50+
LLVMInitializeGenXTarget();
51+
LLVMInitializeGenXTargetInfo();
52+
2253
PB.registerAnalysisRegistrationCallback([=](ModuleAnalysisManager &MAM) {
2354
MAM.registerPass([&] { return CMABIAnalysisPass(); });
2455
MAM.registerPass([&] { return GenXBackendConfigPass(); });
2556
});
2657

2758
auto *BC = new GenXBackendConfig;
2859

60+
const TargetOptions Options;
61+
auto TheTriple = Triple("genx64-unknown-unknown");
62+
std::string Error = "";
63+
std::string CPUStr = "";
64+
std::string FeaturesStr = "";
65+
const Target *TheTarget = TargetRegistry::lookupTarget(
66+
TheTriple.getArchName().str(), TheTriple, Error);
67+
68+
llvm::TargetMachine *TM =
69+
GetTargetMachine(TheTriple, CPUStr, FeaturesStr, Options);
70+
2971
#define ADD_PASS(NAME, CREATE_PASS) \
3072
if (Name == NAME) { \
3173
PM.addPass(CREATE_PASS); \

‎IGC/VectorCompiler/test/CMakeLists.txt‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,9 @@ if(LLVM_ON_UNIX)
3636
llc
3737
VCBackendPlugin
3838
)
39+
if (${LLVM_VERSION_MAJOR} GREATER 15)
40+
list(APPEND TEST_DEPS NewPMPlugin)
41+
endif()
3942
endif()
4043

4144
file(GLOB_RECURSE _tests "${VC_TEST_SOURCE_DIR}/*.ll" "${VC_TEST_SOURCE_DIR}/*.s")

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