|
| 1 | +;=========================== begin_copyright_notice ============================ |
| 2 | +; |
| 3 | +; Copyright (C) 2025 Intel Corporation |
| 4 | +; |
| 5 | +; SPDX-License-Identifier: MIT |
| 6 | +; |
| 7 | +;============================ end_copyright_notice ============================= |
| 8 | +; REQUIRES: llvm-14-plus, regkeys, system-linux |
| 9 | +; RUN: igc_opt --opaque-pointers --regkey ForceLoopSink=1 --regkey LoopSinkMinSave=1 --regkey LoopSinkThresholdDelta=10 --regkey CodeLoopSinkingMinSize=10 --regkey PrepopulateLoadChainLoopSink=1 --igc-wi-analysis --basic-aa --igc-code-loop-sinking -S %s > %t.test1.ll |
| 10 | +; RUN: igc_opt --opaque-pointers --regkey ForceLoopSink=1 --regkey LoopSinkMinSave=1 --regkey LoopSinkThresholdDelta=10 --regkey CodeLoopSinkingMinSize=10 --regkey PrepopulateLoadChainLoopSink=1 --igc-wi-analysis --basic-aa --igc-code-loop-sinking -S %s > %t.test2.ll |
| 11 | + |
| 12 | +; Compares results of two runs of load sinking to ensure that results are deterministic. |
| 13 | +; RUN: diff %t.test1.ll %t.test2.ll |
| 14 | +define spir_kernel void @dsmm23x23x23(i16 %localIdX) { |
| 15 | + |
| 16 | +entry: |
| 17 | + %conv2 = zext i16 %localIdX to i32 |
| 18 | + %idxprom36 = zext i16 %localIdX to i64 |
| 19 | + %add33.1 = add nuw nsw i32 %conv2, 23 |
| 20 | + %idxprom34.1 = zext i32 %add33.1 to i64 |
| 21 | + %add33.2 = add nuw nsw i32 %conv2, 46 |
| 22 | + %idxprom34.2 = zext i32 %add33.2 to i64 |
| 23 | + %add33.3 = add nuw nsw i32 %conv2, 69 |
| 24 | + %idxprom34.3 = zext i32 %add33.3 to i64 |
| 25 | + %0 = shl nuw nsw i64 %idxprom36, 3 |
| 26 | + %1 = shl nuw nsw i64 %idxprom34.1, 3 |
| 27 | + %2 = shl nuw nsw i64 %idxprom34.2, 3 |
| 28 | + %3 = shl nuw nsw i64 %idxprom34.3, 3 |
| 29 | + br label %for.body |
| 30 | + |
| 31 | +for.body: ; preds = %for.body, %entry |
| 32 | + %4 = add i64 0, 0 |
| 33 | + %5 = add i64 %4, %0 |
| 34 | + %6 = inttoptr i64 %5 to ptr addrspace(2) |
| 35 | + %7 = load double, ptr addrspace(2) %6, align 8 |
| 36 | + %8 = add i64 %4, %1 |
| 37 | + %9 = inttoptr i64 %8 to ptr addrspace(2) |
| 38 | + %10 = load double, ptr addrspace(2) %9, align 8 |
| 39 | + %11 = add i64 %4, %2 |
| 40 | + %12 = inttoptr i64 %11 to ptr addrspace(2) |
| 41 | + %13 = load double, ptr addrspace(2) %12, align 8 |
| 42 | + %14 = add i64 %4, %3 |
| 43 | + %15 = inttoptr i64 %14 to ptr addrspace(2) |
| 44 | + %16 = load double, ptr addrspace(2) %15, align 8 |
| 45 | + br label %for.body |
| 46 | +} |
0 commit comments