Support lowering llvm.powi with scalar power

.

Author: igorban-intel

IGC/VectorCompiler/lib/GenXCodeGen/GenXLowering.cpp

@@ -4491,11 +4491,20 @@ bool GenXLowering::lowerFMulAdd(CallInst *CI) {
 bool GenXLowering::lowerPowI(CallInst *CI) {
   IGC_ASSERT(CI);
   IRBuilder<> IRB{CI};
-  auto *Decl = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::pow,
-                                         {CI->getType()});
-  auto *Cast =
-      IRB.CreateCast(Instruction::SIToFP, CI->getOperand(1), CI->getType());
-  auto *Pow = IRB.CreateCall(Decl, {CI->getOperand(0), Cast}, CI->getName());
+  auto *CITy = CI->getType();
+  auto *Decl =
+      Intrinsic::getDeclaration(CI->getModule(), Intrinsic::pow, {CITy});
+  auto *Operand = CI->getOperand(1);
+  // For pow @llvm.powi.v*.i*(< x > , i32 ) cases
+  if (auto *CIVTy = dyn_cast<IGCLLVM::FixedVectorType>(CITy);
+      CIVTy && !Operand->getType()->isVectorTy()) {
+    auto *ElTy = CIVTy->getElementType();
+    Operand = IRB.CreateSIToFP(Operand, ElTy);
+    Operand = IRB.CreateVectorSplat(CIVTy->getNumElements(), Operand);
+  } else {
+    Operand = IRB.CreateCast(Instruction::SIToFP, Operand, CITy);
+  }
+  auto *Pow = IRB.CreateCall(Decl, {CI->getOperand(0), Operand}, CI->getName());
   Pow->setHasApproxFunc(true);
   CI->replaceAllUsesWith(Pow);
   ToErase.push_back(CI);

IGC/VectorCompiler/lib/GenXCodeGen/GenXUtil.cpp

@@ -2593,7 +2593,6 @@ bool genx::isSafeToMove_CheckAVLoadKill(const Instruction *const I,
     return !getAVLoadKillOrNull(I, To, true, false, DT);
   for (auto *LI : getSrcVLoads(I)) {
     const bool LIDomTo = !DT || DT->dominates(LI, To);
-    IGC_ASSERT(LIDomTo);
     if (!LIDomTo || getAVLoadKillOrNull(LI, To))
       return false;
   }

IGC/VectorCompiler/test/Lowering/powi.ll

@@ -56,4 +56,12 @@ define spir_func <64 x bfloat> @powi_bfloat_i8(<64 x i8> %src, <64 x bfloat> %sr
   ret <64 x bfloat> %res
 }
 
+declare <64 x float> @llvm.powi.v64f32.i32(<64 x float>, i32)
+; CHECK-LABEL: powi_float_i32
+define spir_func <64 x float> @powi_float_i32(<64 x float> %src) {
+; CHECK: {{.*}} = call afn <64 x float> @llvm.pow.v64f32(<64 x float> %src, <64 x float> <float -4.000000e+00,
+  %res = tail call afn <64 x float> @llvm.powi.v64f32.i32(<64 x float> %src, i32 -4)
+  ret <64 x float> %res
+}
+
 attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }