@@ -692,7 +692,7 @@ void BinaryEncodingIGA::DoAll()
692692 Instruction *igaInst = nullptr ;
693693 auto igaOpcode = getIGAOp (inst->opcode (), inst, platformModel->platform );
694694 // common fields: op, predicate, flag reg, exec size, exec mask offset, mask ctrl, conditional modifier
695- const OpSpec* opSpec = &( platformModel->lookupOpSpec (igaOpcode) );
695+ const OpSpec* opSpec = &platformModel->lookupOpSpec (igaOpcode);
696696
697697 if (opSpec->op == Op::INVALID)
698698 {
@@ -701,10 +701,10 @@ void BinaryEncodingIGA::DoAll()
701701 continue ;
702702 }
703703 Predication pred;
704- RegRef flagReg = { 0 , 0 };
704+ RegRef flagReg { 0 , 0 };
705705 ExecSize execSize = getIGAExecSize (inst->getExecSize ());
706706 ChannelOffset chOff = getIGAChannelOffset (inst->getMaskOffset ());
707- MaskCtrl maskCtrl = getIGAMaskCtrl (inst->opcode () == G4_jmpi ? true : inst->isWriteEnableInst ());
707+ MaskCtrl maskCtrl = getIGAMaskCtrl (inst->opcode () == G4_jmpi || inst->isWriteEnableInst ());
708708 FlagModifier condModifier = FlagModifier::NONE;
709709
710710 getIGAFlagInfo (inst, opSpec, pred, condModifier, flagReg);
@@ -752,16 +752,18 @@ void BinaryEncodingIGA::DoAll()
752752 {
753753 igaInst =
754754 IGAKernel->createBasicInstruction (
755- *opSpec,
756- pred,
757- flagReg,
758- execSize,
759- chOff,
760- maskCtrl,
761- condModifier);
755+ *opSpec,
756+ pred,
757+ flagReg,
758+ execSize,
759+ chOff,
760+ maskCtrl,
761+ condModifier);
762762 }
763763
764764 igaInst->setID (IGAInstId++);
765+ igaInst->setLoc (inst->getCISAOff ()); // make IGA src off track CISA id
766+
765767 if (opSpec->supportsDestination ())
766768 {
767769 assert (inst->getDst () && " dst must not be null" );
@@ -770,10 +772,10 @@ void BinaryEncodingIGA::DoAll()
770772 Region::Horz hstride = getIGAHorz (dst->getHorzStride ());
771773 Type type = getIGAType (dst->getType ());
772774
773- // work around for SKL bug
774- // not all bits are copied from immediate descriptor
775- if (inst->isSend () &&
776- platform >= GENX_SKL &&
775+ // workaround for SKL bug
776+ // not all bits are copied from immediate descriptor
777+ if (inst->isSend () &&
778+ platform >= GENX_SKL &&
777779 platform < GENX_CNL)
778780 {
779781 G4_SendMsgDescriptor* msgDesc = inst->getMsgDesc ();
@@ -808,7 +810,7 @@ void BinaryEncodingIGA::DoAll()
808810 }
809811 else
810812 { // Operand::Kind::INDIRECT
811- RegRef regRef = { 0 , 0 };
813+ RegRef regRef { 0 , 0 };
812814 bool valid;
813815 regRef.subRegNum = (uint8_t ) dst->ExIndSubRegNum (valid);
814816 igaInst->setInidirectDestination (
@@ -952,7 +954,7 @@ void BinaryEncodingIGA::DoAll()
952954 }
953955 else
954956 {
955- RegRef regRef = { 0 , 0 };
957+ RegRef regRef { 0 , 0 };
956958 bool valid;
957959 regRef.subRegNum = (uint8_t )srcRegion->ExIndSubRegNum (valid);
958960 igaInst->setInidirectSource (
@@ -1009,9 +1011,9 @@ void BinaryEncodingIGA::DoAll()
10091011
10101012 if (bbNew)
10111013 {
1012- // Fall through block is created.
1013- // So the new block needs to become current block
1014- // so that jump offsets can be calculated correctly
1014+ // Fall through block is created.
1015+ // So the new block needs to become current block
1016+ // so that jump offsets can be calculated correctly
10151017 currBB = bbNew;
10161018 }
10171019 // If, in future, we generate multiple binary inst
@@ -1163,7 +1165,7 @@ SendDesc BinaryEncodingIGA::getIGASendExDesc(
11631165 assert (valid && " invalid subreg" );
11641166 }
11651167 }
1166- else
1168+ else // old unary packed send
11671169 {
11681170 // exDesc is stored in SendMsgDesc and must be IMM
11691171 G4_SendMsgDescriptor* sendDesc = sendInst->getMsgDesc ();
@@ -1177,6 +1179,8 @@ SendDesc BinaryEncodingIGA::getIGASendExDesc(
11771179 tVal = tVal & 0xFFFFFFF0 ;
11781180 }
11791181 exDescArg.imm = tVal;
1182+ // non-split send implies Src1.Length == 0
1183+ xlen = 0 ;
11801184 }
11811185
11821186 return exDescArg;
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