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Reduce the number of atomics hitting the same cache line by performing atomic
predication:
atomic_umin(src, x)
->
t = read(src)
if (x < t) {
atomic_umin(src, x)
}
Copy file name to clipboardExpand all lines: IGC/common/igc_flags.h
+1-1Lines changed: 1 addition & 1 deletion
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@@ -227,7 +227,7 @@ DECLARE_IGC_REGKEY(debugString, LLVMCommandLine, 0, "applies LLVM com
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DECLARE_IGC_REGKEY(debugString, SelectiveHashOptions, 0, "applies options to hash range via string", false)
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DECLARE_IGC_REGKEY(bool, DisableDX9LowPrecision, true, "Disables HF in DX9.", false)
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DECLARE_IGC_REGKEY(bool, EnablePingPongTextureOpt, true, "Enables the Ping Pong texture optimization which is used only for Compute Shaders for back to back dispatches", false)
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DECLARE_IGC_REGKEY(DWORD,EnableAtomicBranch, 0, "Enable Atomic branch optimization that break atomic into if/else. 1: if Val == 0 ignore iadd/sub/umax 0. 2: checks if memory is lower than Val before doing umax. 3: applies both 1 for iadd/sub and 2 for umax", false)
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+
DECLARE_IGC_REGKEY(DWORD,EnableAtomicBranch, 0, "Bitmask to enable Atomic branch optimization that predicates atomic with if/else. 1: if Val == 0 ignore iadd/sub/umax 0. 2: checks if memory is lower than Val for umax. 4: checks if memory if greater than Val for umin.", false)
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DECLARE_IGC_REGKEY(bool, EnableThreeWayLoadSpiltOpt, false, "Enable three way load spilt opt.", false)
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DECLARE_IGC_REGKEY(bool, EnableSamplerChannelReturn, true, "Setting this to 1/true adds a compiler switch to enable using header to return selective channels from sampler", false)
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DECLARE_IGC_REGKEY(bool, EnableThreadCombiningOpt, true, "Enables the thread combining optimization which is used only for Compute Shaders for combining a number of software threads to dispatch smaller number of hardware threads", false)
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