Add ocl compiler flag "-cl-intel-disable-a64WA" to disable A64 WA

Change-Id: I5c7faec0269b153308516ff6bf8b3529a482b1d4

Author: DianaChen

IGC/AdaptorOCL/UnifyIROCL.cpp

@@ -243,6 +243,9 @@ static void CommonOCLBasedPasses(
     CompilerOpts.GreaterThan4GBBufferRequired =
         pContext->m_InternalOptions.IntelGreaterThan4GBBufferRequired;
 
+    CompilerOpts.DisableA64WA =
+        pContext->m_InternalOptions.IntelDisableA64WA;
+
     CompilerOpts.HasBufferOffsetArg =
         pContext->m_InternalOptions.IntelHasBufferOffsetArg;
 

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

@@ -14415,9 +14415,16 @@ void EmitPass::A64LSLoopTail(CVariable* curMask, CVariable* lsPred, uint label)
     m_encoder->SetSecondHalf(tmpSh);
 }
 
+bool EmitPass::hasA64WAEnable() const
+{
+    if (m_pCtx->getModuleMetaData()->compOpt.DisableA64WA)
+        return false;
+    return m_currShader->m_Platform->WaEnableA64WA();
+}
+
 void EmitPass::emitGatherA64(CVariable* dst, CVariable* offset, unsigned elemSize, unsigned numElems)
 {
-    if (IGC_IS_FLAG_ENABLED(EnableA64WA) && !offset->IsUniform()) {
+    if (hasA64WAEnable() && !offset->IsUniform()) {
         CVariable* curMask = nullptr;
         CVariable* lsPred = nullptr;
         uint label = 0;
@@ -14437,7 +14444,7 @@ void EmitPass::emitGatherA64(CVariable* dst, CVariable* offset, unsigned elemSiz
 
 void EmitPass::emitGather4A64(CVariable* dst, CVariable* offset)
 {
-    if (IGC_IS_FLAG_ENABLED(EnableA64WA) && !offset->IsUniform()) {
+    if (hasA64WAEnable() && !offset->IsUniform()) {
         CVariable* curMask = nullptr;
         CVariable* lsPred = nullptr;
         uint label = 0;
@@ -14458,7 +14465,7 @@ void EmitPass::emitGather4A64(CVariable* dst, CVariable* offset)
 
 void EmitPass::emitScatterA64(CVariable* val, CVariable* offset, unsigned elementSize, unsigned numElems)
 {
-    if (IGC_IS_FLAG_ENABLED(EnableA64WA) && !offset->IsUniform()) {
+    if (hasA64WAEnable() && !offset->IsUniform()) {
         CVariable* curMask = nullptr;
         CVariable* lsPred = nullptr;
         uint label = 0;
@@ -14479,7 +14486,7 @@ void EmitPass::emitScatterA64(CVariable* val, CVariable* offset, unsigned elemen
 
 void EmitPass::emitScatter4A64(CVariable* src, CVariable* offset)
 {
-    if (IGC_IS_FLAG_ENABLED(EnableA64WA) && !offset->IsUniform()) {
+    if (hasA64WAEnable() && !offset->IsUniform()) {
         CVariable* curMask = nullptr;
         CVariable* lsPred = nullptr;
         uint label = 0;

IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

@@ -644,6 +644,9 @@ namespace IGC
         // Helper functions that create loop for above WA
         void A64LSLoopHead(CVariable* addr, CVariable*& curMask, CVariable*& lsPred, uint& label);
         void A64LSLoopTail(CVariable* curMask, CVariable* lsPred, uint label);
+
+        // Helper function to check if A64 WA is required
+        bool hasA64WAEnable() const;
     };
 
 } // namespace IGC

IGC/Compiler/CISACodeGen/Platform.hpp

@@ -508,6 +508,15 @@ namespace IGC
         return IGFX_GEN11_CORE >= m_platformInfo.eRenderCoreFamily;
     }
 
+    bool WaEnableA64WA() const
+    {
+        if (IGC_IS_FLAG_ENABLED(EnableA64WA)) {
+            if (m_platformInfo.eProductFamily == IGFX_TIGERLAKE_LP)
+                return true;
+        }
+        return false;
+    }
+
         const SCompilerHwCaps& GetCaps() { return m_caps; }
     };
 

IGC/Compiler/CodeGenPublic.h

@@ -1064,6 +1064,11 @@ namespace IGC
                     IntelHasBufferOffsetArg = true;
                 }
 
+                if (strstr(options, "-cl-intel-disable-a64WA"))
+                {
+                    IntelDisableA64WA = true;
+                }
+
                 if (strstr(options, "-cl-intel-gtpin-rera"))
                 {
                     DoReRA = true;
@@ -1091,6 +1096,7 @@ namespace IGC
             bool IncludeSIPCSR;
             bool IncludeSIPKernelDebug;
             bool IntelGreaterThan4GBBufferRequired;
+            bool IntelDisableA64WA = false;
             bool Use32BitPtrArith = false;
             bool IncludeSIPKernelDebugWithLocalMemory;
             bool DoReRA;

IGC/OCLFE/igd_fcl_mcl/source/clang_tb.cpp

@@ -1348,7 +1348,8 @@ namespace TC
                             (strcmp(pParam, "-igc_opts") == 0) || //temporary options
                             (strcmp(pParam, "-cl-intel-debug-info") == 0) ||
                             (strncmp(pParam, "-dump-opt-llvm", 14) == 0) ||
-                            (strcmp(pParam, "-cl-no-subgroup-ifp") == 0);
+                            (strcmp(pParam, "-cl-no-subgroup-ifp") == 0) ||
+                            (strcmp(pParam, "-cl-intel-disable-a64WA") == 0); //temporary options;
 
 
 

IGC/common/MDFrameWork.h

@@ -205,6 +205,7 @@ namespace IGC
         bool SubgroupIndependentForwardProgressRequired = true;
         bool GreaterThan2GBBufferRequired               = true;
         bool GreaterThan4GBBufferRequired               = true;
+        bool DisableA64WA                               = false;
         bool PushConstantsEnable                        = true;
         bool HasBufferOffsetArg                         = false;
         bool replaceGlobalOffsetsByZero                 = false;