Revert back vector decomposer benavior in VC

.

(cherry picked from commit 7901165)

Author: vsemenov368

IGC/VectorCompiler/lib/GenXCodeGen/GenXPostLegalization.cpp

@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2024 Intel Corporation
+Copyright (C) 2017-2022 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -100,7 +100,7 @@ bool GenXPostLegalization::runOnFunction(Function &F)
             .getTM<GenXTargetMachine>()
             .getGenXSubtarget();
 
-  VectorDecomposer VD;
+  VectorDecomposer VD(ST);
 
   bool Modified = false;
   Modified |= vc::breakConstantExprs(&F, vc::LegalizationStage::Legalized);

IGC/VectorCompiler/lib/GenXCodeGen/GenXVectorDecomposer.cpp

@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2024 Intel Corporation
+Copyright (C) 2017-2022 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -167,15 +167,15 @@ bool VectorDecomposer::determineDecomposition(Instruction *Inst) {
   NotDecomposingReportInst = Inst;
   Web.clear();
   Decomposition.clear();
-  unsigned ChunkWidth = genx::ByteBits * ChunkByteSize;
-  unsigned NumChunks =
-      alignTo(DL->getTypeSizeInBits(Inst->getType()), ChunkWidth) / ChunkWidth;
-  if (NumChunks == 1)
-    return false; // Ignore single chunk vector.
+  unsigned GRFWidth = genx::ByteBits * GRFByteSize;
+  unsigned NumGrfs =
+      alignTo(DL->getTypeSizeInBits(Inst->getType()), GRFWidth) / GRFWidth;
+  if (NumGrfs == 1)
+    return false; // Ignore single GRF vector.
   LLVM_DEBUG(dbgs() << "VectorDecomposer::determineDecomposition(" << *Inst
-                    << " NumChunks: " << NumChunks << ")\n");
+                    << ")\n");
   NotDecomposing = false;
-  for (unsigned i = 0; i != NumChunks; ++i)
+  for (unsigned i = 0; i != NumGrfs; ++i)
     Decomposition.push_back(i);
   addToWeb(Inst);
   for (unsigned Idx = 0; Idx != Web.size(); ++Idx) {
@@ -263,7 +263,7 @@ bool VectorDecomposer::determineDecomposition(Instruction *Inst) {
   //
   // Change Decomposition[] so the indices used are contiguous, changing the
   // example above to { 0, 0, 1, 1, 2, 2, 2, 2, 3, 3 }, and create the Offsets[]
-  // array to translate a value from Decomposition[] into the chunk offset, so
+  // array to translate a value from Decomposition[] into the GRF offset, so
   // for this example { 0, 2, 4, 8 }.
   Offsets.clear();
   for (unsigned Last = UINT_MAX, i = 0, e = Decomposition.size(); i != e; ++i) {
@@ -349,15 +349,15 @@ void VectorDecomposer::adjustDecomposition(Instruction *Inst) {
     Last = (R.NumElements / R.Width - 1) * R.VStride;
   Last += (R.Width - 1) * R.Stride;
   Last = R.Offset + Last * R.ElementBytes;
-  // Compute the chunk number of the first and last byte of the region.
-  unsigned First = R.Offset / ChunkByteSize;
-  Last /= ChunkByteSize;
+  // Compute the GRF number of the first and last byte of the region.
+  unsigned First = R.Offset / GRFByteSize;
+  Last /= GRFByteSize;
   if ((First >= Decomposition.size()) || (Last >= Decomposition.size())) {
     setNotDecomposing(Inst, "out-of-bounds");
     return; // don't attempt to decompose out-of-bounds accesses
   }
   if (First != Last) {
-    // This region spans more than one chunk. Ensure they are all in the same
+    // This region spans more than one GRF. Ensure they are all in the same
     // decomposed vector.
     for (unsigned i = Last + 1;
          i != Decomposition.size() && Decomposition[i] == Decomposition[Last];
@@ -705,28 +705,28 @@ void VectorDecomposer::decomposeBitCast(Instruction *Inst,
  * VectorDecomposer::getPartIndex : get the part index for the region
  */
 unsigned VectorDecomposer::getPartIndex(vc::Region *R) {
-  return Decomposition[R->Offset / ChunkByteSize];
+  return Decomposition[R->Offset / GRFByteSize];
 }
 
 /***********************************************************************
  * VectorDecomposer::getPartOffset : get the byte offset of a part
  */
 unsigned VectorDecomposer::getPartOffset(unsigned PartIndex) {
-  // Offsets[] has the index in chunks.
-  return Offsets[PartIndex] * ChunkByteSize;
+  // Offsets[] has the index in GRFs.
+  return Offsets[PartIndex] * GRFByteSize;
 }
 
 /***********************************************************************
  * VectorDecomposer::getPartNumBytes : get the size of a part in bytes
  */
 unsigned VectorDecomposer::getPartNumBytes(Type *WholeTy, unsigned PartIndex) {
   if (PartIndex + 1 != Offsets.size()) {
-    // Not the last part. We can use the offset (in chunks) difference.
-    return ChunkByteSize * (Offsets[PartIndex + 1] - Offsets[PartIndex]);
+    // Not the last part. We can use the offset (in GRFs) difference.
+    return GRFByteSize * (Offsets[PartIndex + 1] - Offsets[PartIndex]);
   }
   // For the last part, we need to get the total size from WholeTy.
   return DL->getTypeSizeInBits(WholeTy) / genx::ByteBits -
-         ChunkByteSize * Offsets[PartIndex];
+         GRFByteSize * Offsets[PartIndex];
 }
 
 /***********************************************************************

IGC/VectorCompiler/lib/GenXCodeGen/GenXVectorDecomposer.h

@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2024 Intel Corporation
+Copyright (C) 2017-2022 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -68,7 +68,10 @@ class VectorDecomposer {
   using Value = llvm::Value;
   using VectorType = llvm::VectorType;
 
+  using GenXSubtarget = llvm::GenXSubtarget;
+
   const DataLayout *DL = nullptr;
+  const GenXSubtarget *ST;
 
   llvm::SmallVector<Instruction *, 16> StartWrRegions;
   std::set<Instruction *> Seen;
@@ -81,9 +84,11 @@ class VectorDecomposer {
   std::map<PHINode *, llvm::SmallVector<Value *, 8>> PhiParts;
   llvm::SmallVector<Instruction *, 8> NewInsts;
   unsigned DecomposedCount = 0;
-  static constexpr unsigned ChunkByteSize = 32;
+  const unsigned GRFByteSize;
 
 public:
+  explicit VectorDecomposer(const GenXSubtarget *ST)
+      : ST(ST), GRFByteSize(ST ? ST->getGRFByteSize() : llvm::genx::defaultGRFByteSize) {}
 
   // clear : clear anything stored
   void clear() {

IGC/VectorCompiler/test/PostLegalization/decomp.ll

@@ -6,14 +6,17 @@
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -GenXPostLegalization -march=genx64 -mcpu=XeHPC -mtriple=spir64 -S < %s | FileCheck %s
+; RUN: %opt %use_old_pass_manager% -GenXPostLegalization -march=genx64 -mcpu=XeHPC -mtriple=spir64 -S < %s | FileCheck %s --check-prefix=XeHPC
+; RUN: %opt %use_old_pass_manager% -GenXPostLegalization -march=genx64 -mcpu=XeHPG -mtriple=spir64 -S < %s | FileCheck %s --check-prefix=XeHPG
 
 declare <48 x i32> @llvm.genx.wrregioni.v48i32.v32i32.i16.i1(<48 x i32>, <32 x i32>, i32, i32, i32, i16, i32, i1)
 declare <32 x i16> @llvm.genx.rdregioni.v32i16.v96i16.i16(<96 x i16>, i32, i32, i32, i16, i32)
 
-; CHECK-LABEL: test1
+; XeHPC-LABEL: test1
+; XeHPG-LABEL: test1
 define <32 x i16> @test1(<32 x i32> %arg) {
-; CHECK-NEXT: call <40 x i32> @llvm.genx.wrregioni.v40i32.v32i32.i16.i1(<40 x i32> zeroinitializer, <32 x i32> %arg, i32 0, i32 32, i32 1, i16 32, i32 undef, i1 true)
+; XeHPC-NEXT: call <48 x i32> @llvm.genx.wrregioni.v48i32.v32i32.i16.i1(<48 x i32> zeroinitializer, <32 x i32> %arg, i32 0, i32 32, i32 1, i16 64, i32 undef, i1 true)
+; XeHPG-NEXT: call <40 x i32> @llvm.genx.wrregioni.v40i32.v32i32.i16.i1(<40 x i32> zeroinitializer, <32 x i32> %arg, i32 0, i32 32, i32 1, i16 32, i32 undef, i1 true)
   %1 = call <48 x i32> @llvm.genx.wrregioni.v48i32.v32i32.i16.i1(<48 x i32> zeroinitializer, <32 x i32> %arg, i32 0, i32 32, i32 1, i16 64, i32 undef, i1 true)
   %cast = bitcast <48 x i32> %1 to <192 x i8>
   %postcast = bitcast <192 x i8> %cast to <96 x i16>
@@ -29,16 +32,26 @@ declare <128 x float> @llvm.genx.dpas2.v128f32.v128f32.v128i32.v64i32(<128 x flo
 declare <256 x float> @llvm.genx.wrregionf.v256f32.v128f32.i16.i1(<256 x float>, <128 x float>, i32, i32, i32, i16, i32, i1)
 declare <64 x i64> @llvm.genx.rdregioni.v64i64.v128i64.i16(<128 x i64>, i32, i32, i32, i16, i32)
 
-; CHECK-LABEL: test2
+; XeHPC-LABEL: test2
+; XeHPG-LABEL: test2
 define <64 x i64> @test2(<256 x i32> %src1, <128 x i32> %src2) {
-  ; CHECK-NEXT: %[[DPAS1_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 0, i32 undef)
-  ; CHECK-NEXT: %[[DPAS1_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 0, i32 undef)
-  ; CHECK-NEXT: %[[DPAS1_D:[^ ]+]] = call <128 x float> @llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32(<128 x i32> %[[DPAS1_1]], <64 x i32> %[[DPAS1_2]], i32 134744329)
-  ; CHECK-NEXT: %[[DPAS2_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 512, i32 undef)
-  ; CHECK-NEXT: %[[DPAS2_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 256, i32 undef)
-  ; CHECK-NEXT: tail call <128 x float> @llvm.genx.dpas2.v128f32.v128f32.v128i32.v64i32(<128 x float> zeroinitializer, <128 x i32> %[[DPAS2_1]], <64 x i32> %[[DPAS2_2]], i32 9, i32 9, i32 8, i32 8, i32 0, i32 0)
-  ; CHECK-NEXT: %[[RET:[^ ]+]] = bitcast <128 x float> %[[DPAS1_D]] to <64 x i64>
-  ; CHECK-NEXT: ret <64 x i64> %[[RET]]
+  ; XeHPC-NEXT: %[[DPAS1_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 0, i32 undef)
+  ; XeHPC-NEXT: %[[DPAS1_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 0, i32 undef)
+  ; XeHPC-NEXT: %[[DPAS1_D:[^ ]+]] = call <128 x float> @llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32(<128 x i32> %[[DPAS1_1]], <64 x i32> %[[DPAS1_2]], i32 134744329)
+  ; XeHPC-NEXT: %[[DPAS2_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 512, i32 undef)
+  ; XeHPC-NEXT: %[[DPAS2_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 256, i32 undef)
+  ; XeHPC-NEXT: tail call <128 x float> @llvm.genx.dpas2.v128f32.v128f32.v128i32.v64i32(<128 x float> zeroinitializer, <128 x i32> %[[DPAS2_1]], <64 x i32> %[[DPAS2_2]], i32 9, i32 9, i32 8, i32 8, i32 0, i32 0)
+  ; XeHPC-NEXT: %[[RET:[^ ]+]] = bitcast <128 x float> %[[DPAS1_D]] to <64 x i64>
+  ; XeHPC-NEXT: ret <64 x i64> %[[RET]]
+
+  ; XeHPG-NEXT: %[[DPAS1_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 0, i32 undef)
+  ; XeHPG-NEXT: %[[DPAS1_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 0, i32 undef)
+  ; XeHPG-NEXT: %[[DPAS1_D:[^ ]+]] = call <128 x float> @llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32(<128 x i32> %[[DPAS1_1]], <64 x i32> %[[DPAS1_2]], i32 134744329)
+  ; XeHPG-NEXT: %[[DPAS2_1:[^ ]+]] = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 512, i32 undef)
+  ; XeHPG-NEXT: %[[DPAS2_2:[^ ]+]] = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 256, i32 undef)
+  ; XeHPG-NEXT: tail call <128 x float> @llvm.genx.dpas2.v128f32.v128f32.v128i32.v64i32(<128 x float> zeroinitializer, <128 x i32> %[[DPAS2_1]], <64 x i32> %[[DPAS2_2]], i32 9, i32 9, i32 8, i32 8, i32 0, i32 0)
+  ; XeHPG-NEXT: %[[RET:[^ ]+]] = bitcast <128 x float> %[[DPAS1_D]] to <64 x i64>
+  ; XeHPG-NEXT: ret <64 x i64> %[[RET]]
 
   %1 = tail call <128 x i32> @llvm.genx.rdregioni.v128i32.v256i32.i16(<256 x i32> %src1, i32 0, i32 128, i32 1, i16 0, i32 undef)
   %2 = tail call <64 x i32> @llvm.genx.rdregioni.v64i32.v128i32.i16(<128 x i32> %src2, i32 0, i32 64, i32 1, i16 0, i32 undef)