Revert new-reg-per-function behavior in VC RA

Change-Id: Ie6483a09bce2e37bf9b17693a63bdbce45baca0b

Author: zuban32

IGC/VectorCompiler/lib/GenXCodeGen/GenXLiveness.cpp

@@ -1629,22 +1629,26 @@ void LiveRange::sortAndMerge() {
  *
  */
 void LiveRange::prepareFuncs(FunctionGroupAnalysis *FGA) {
-  for (auto &val : getValues()) {
-    auto Inst = dyn_cast<Instruction>(val.getValue());
+  // Funcs must be empty as it's being filled immediately
+  // before it's required in VisaRegAlloc (because most of the passes
+  // invalidate this set) once for every LR
+  assert(Funcs.empty());
+  for (auto &Val : getValues()) {
+    auto Inst = dyn_cast<Instruction>(Val.getValue());
     Function *DefFunc = nullptr;
     if (Inst && Inst->getParent())
       DefFunc = Inst->getFunction();
-    else if (auto Arg = dyn_cast<Argument>(val.getValue()))
+    else if (auto Arg = dyn_cast<Argument>(Val.getValue()))
       DefFunc = Arg->getParent();
 
     if (DefFunc)
       Funcs.insert(FGA->getSubGroup(DefFunc)
         ? FGA->getSubGroup(DefFunc)->getHead()
         : FGA->getGroup(DefFunc)->getHead());
 
-    for (auto U : val.getValue()->users())
-      if (Instruction *userInst = dyn_cast<Instruction>(U)) {
-        auto F = userInst->getFunction();
+    for (auto U : Val.getValue()->users())
+      if (Instruction *UserInst = dyn_cast<Instruction>(U)) {
+        auto F = UserInst->getFunction();
         Funcs.insert(FGA->getSubGroup(F) ? FGA->getSubGroup(F)->getHead()
                                          : FGA->getGroup(F)->getHead());
       }

IGC/VectorCompiler/lib/GenXCodeGen/GenXVisaRegAlloc.cpp

@@ -317,17 +317,12 @@ void GenXVisaRegAlloc::extraCoalescing()
 /***********************************************************************
  * allocReg : allocate a register for a LiveRange
  */
-void GenXVisaRegAlloc::allocReg(LiveRange *LR)
-{
+void GenXVisaRegAlloc::allocReg(LiveRange *LR) {
   if (LR->value_empty())
     return;
   if (LR->getCategory() >= RegCategory::NUMREALCATEGORIES)
     return; // don't allocate register to EM or RM value
-  LLVM_DEBUG(
-    dbgs() << "Allocating ";
-    LR->print(dbgs());
-    dbgs() << "\n"
-  );
+  LLVM_DEBUG(dbgs() << "Allocating "; LR->print(dbgs()); dbgs() << "\n");
   SimpleValue V = *LR->value_begin();
   Type *Ty = V.getType();
   if (auto GV = dyn_cast<GlobalVariable>(V.getValue()))
@@ -336,28 +331,29 @@ void GenXVisaRegAlloc::allocReg(LiveRange *LR)
   assert(!Ty->isVoidTy());
   if (LR->Category == RegCategory::PREDICATE) {
     VectorType *VT = dyn_cast<VectorType>(Ty);
-    assert((!VT || genx::exactLog2(VT->getNumElements()) >= 0) && "invalid predicate width");
+    assert((!VT || genx::exactLog2(VT->getNumElements()) >= 0) &&
+           "invalid predicate width");
     (void)VT;
   }
   // Allocate the register, also setting the alignment.
+  Reg *NewReg =
+      createReg(LR->Category, Ty, DONTCARESIGNED, LR->getLogAlignment());
   // Assign to the values. If any value is an input arg, ensure the register
   // gets its type, to avoid needing an alias for an input arg.
-  for (auto &F : LR->Funcs) {
-    Reg *NewReg =
-        createReg(LR->Category, Ty, DONTCARESIGNED, LR->getLogAlignment());
-    if (RegMap.count(F) > 0) {
-      for (LiveRange::value_iterator vi = LR->value_begin(),
-                                     ve = LR->value_end();
-           vi != ve; ++vi) {
-        LLVM_DEBUG(dbgs() << "Allocating reg " << NewReg->Num << " to "
+  for (LiveRange::value_iterator vi = LR->value_begin(), ve = LR->value_end();
+       vi != ve; ++vi) {
+    for (auto &F : LR->Funcs) {
+      if (FGA->getGroup(F) == FG) {
+        assert(RegMap.count(F) > 0);
+        LLVM_DEBUG(dbgs() << "Allocating reg " << NewReg->Num << " for "
                           << *(vi->getValue()) << " in func " << F->getName()
-                          << "\n";);
+                          << "\n");
         assert(RegMap.at(F).find(*vi) == RegMap.at(F).end());
         RegMap.at(F)[*vi] = NewReg;
-        if (isa<Argument>(vi->getValue()))
-          NewReg->Ty = vi->getType();
       }
     }
+    if (isa<Argument>(vi->getValue()))
+      NewReg->Ty = vi->getType();
   }
 }