Skip SOA promotion for variable i8 GEPs

Add a bail out in SOALayoutChecker::MismatchDetected to treat i8-based
GEPs with non-constant byte indices as a mismatch and disable SOA
promotion for those allocas. This avoids incorrect results produced by the
legacy scalarization path when byte-wise addressing is used and the
offsets are not multiples of the lane size.

Author: michalpaszkowski

IGC/Compiler/CISACodeGen/LowerGEPForPrivMem.cpp

@@ -554,16 +554,29 @@ bool SOALayoutChecker::visitIntrinsicInst(IntrinsicInst &II) {
   return IID == llvm::Intrinsic::lifetime_start || IID == llvm::Intrinsic::lifetime_end;
 }
 
-// Detection of mismatch between type sizes of
-// alloca -> load / store
-// or
-// alloca -> gep -> load / store
+// Detect size mismatches between an alloca's element and the corresponding load/store element (directly or via a GEP).
+// Return true to disable SOA promotion.
 bool IGC::SOALayoutChecker::MismatchDetected(Instruction &I) {
 
   if (!isa<LoadInst>(I) && !isa<StoreInst>(I))
     return false;
 
-  // Only detect mismatch if are have opaque pointers (LLVM>=16)
+  // Skip when we see an i8-based GEP with a non-constant (dynamic) byte offset. The legacy (old) algorithm assumes byte
+  // offsets map exactly to whole promoted elements (e.g. multiples of the lane size) and cannot safely reconstruct
+  // sub‑element (inter-lane or unaligned) accesses. Using it would risk incorrect indexing. The new byte-precise
+  // algorithm could handle this, but while it is disabled we treat such dynamic i8 GEPs as a mismatch and leave them
+  // untouched.
+  for (User *U : allocaRef.users()) {
+    if (auto *GEP = dyn_cast<GetElementPtrInst>(U)) {
+      if (GEP->getSourceElementType()->isIntegerTy(8) && GEP->getNumOperands() > 1 &&
+          !isa<ConstantInt>(GEP->getOperand(1))) {
+        pInfo->canUseSOALayout = false;
+        return true;
+      }
+    }
+  }
+
+  // Apply the following mismatch checks only with opaque pointers.
   if (!IGC::AreOpaquePointersEnabled())
     return false;
 

IGC/Compiler/tests/LowerGEPForPrivMem/skip_i8_gep_non_constant_offset.ll

@@ -0,0 +1,49 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2025 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+
+; RUN: igc_opt --opaque-pointers -igc-priv-mem-to-reg -S < %s 2>&1 | FileCheck %s
+
+; Verify that byte-wise (i8) GEPs with a non-constant index are NOT scalarized
+; by the legacy handleGEPInst path. The pass should skip transforming these to
+; avoid incorrect handling of inter-lane (unaligned) byte offsets.
+; The new algorithm (when enabled) can handle them, but is not used yet.
+
+; CHECK-LABEL: @test(
+; CHECK: for.body:
+; CHECK: %idx = phi i64 [ 0, %entry ], [ %idx.next, %for.body ]
+; CHECK: %src.gep = getelementptr i8, ptr {{%.*}}, i64 %idx
+; CHECK: %dst.gep = getelementptr i8, ptr {{%.*}}, i64 %idx
+; CHECK: load i8, ptr %src.gep
+; CHECK: store i8
+; CHECK-NOT: insertelement
+; CHECK-NOT: extractelement
+
+define spir_kernel void @test() {
+entry:
+  %src = alloca [64 x i32], align 4
+  %dst = alloca [64 x i32], align 4
+  br label %for.body
+
+for.body:                                        ; preds = %entry, %for.body
+  %idx = phi i64 [ 0, %entry ], [ %idx.next, %for.body ]
+  %src.gep = getelementptr i8, ptr %src, i64 %idx
+  %dst.gep = getelementptr i8, ptr %dst, i64 %idx
+  %val = load i8, ptr %src.gep, align 1
+  store i8 %val, ptr %dst.gep, align 1
+  %idx.next = add nuw i64 %idx, 1
+  %exitcond = icmp eq i64 %idx.next, 256          ; 256 bytes = 64 * 4
+  br i1 %exitcond, label %exit, label %for.body
+
+exit:
+  ret void
+}
+
+!igc.functions = !{!1}
+!1 = !{ptr @test, !2}
+!2 = !{!3}
+!3 = !{!"function_type", i32 0}