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1 | 1 | ;=========================== begin_copyright_notice ============================ |
2 | 2 | ; |
3 | | -; Copyright (C) 2023 Intel Corporation |
| 3 | +; Copyright (C) 2023-2025 Intel Corporation |
4 | 4 | ; |
5 | 5 | ; SPDX-License-Identifier: MIT |
6 | 6 | ; |
@@ -30,6 +30,12 @@ declare <8 x bfloat> @llvm.fmuladd.v8bf16(<8 x bfloat>, <8 x bfloat>, <8 x bfloa |
30 | 30 | declare <8 x i32> @llvm.fptosi.sat.v8i32.v8bf16(<8 x bfloat>) |
31 | 31 | declare <8 x i32> @llvm.fptoui.sat.v8i32.v8bf16(<8 x bfloat>) |
32 | 32 |
|
| 33 | +declare <8 x bfloat> @llvm.ceil.v8bf16(<8 x bfloat>) |
| 34 | +declare <8 x bfloat> @llvm.floor.v8bf16(<8 x bfloat>) |
| 35 | +declare <8 x bfloat> @llvm.round.v8bf16(<8 x bfloat>) |
| 36 | +declare <8 x bfloat> @llvm.trunc.v8bf16(<8 x bfloat>) |
| 37 | + |
| 38 | + |
33 | 39 | ; CHECK-LABEL: test_sat |
34 | 40 | define <8 x bfloat> @test_sat(<8 x bfloat> %src) { |
35 | 41 | ; CHECK: [[EXT:%[^ ]+]] = fpext <8 x bfloat> %src to <8 x float> |
@@ -196,3 +202,45 @@ define <8 x i32> @test_fptoui_sat(<8 x bfloat> %src) { |
196 | 202 | %res = call <8 x i32> @llvm.fptoui.sat.v8i32.v8bf16(<8 x bfloat> %src) |
197 | 203 | ret <8 x i32> %res |
198 | 204 | } |
| 205 | + |
| 206 | +; CHECK-LABEL: test_ceil |
| 207 | +define <8 x bfloat> @test_ceil(<8 x bfloat> %src) { |
| 208 | + ; CHECK: [[EXT:%[^ ]+]] = fpext <8 x bfloat> %src to <8 x float> |
| 209 | + ; CHECK: [[RES:%[^ ]+]] = call fast <8 x float> @llvm.ceil.v8f32(<8 x float> [[EXT]]) |
| 210 | + ; CHECK: [[TRUNC:%[^ ]+]] = fptrunc <8 x float> [[RES]] to <8 x bfloat> |
| 211 | + ; CHECK: ret <8 x bfloat> [[TRUNC]] |
| 212 | + %res = call fast <8 x bfloat> @llvm.ceil.v8bf16(<8 x bfloat> %src) |
| 213 | + ret <8 x bfloat> %res |
| 214 | +} |
| 215 | + |
| 216 | +; CHECK-LABEL: test_floor |
| 217 | +define <8 x bfloat> @test_floor(<8 x bfloat> %src) { |
| 218 | + ; CHECK: [[EXT:%[^ ]+]] = fpext <8 x bfloat> %src to <8 x float> |
| 219 | + ; CHECK: [[RES:%[^ ]+]] = call fast <8 x float> @llvm.floor.v8f32(<8 x float> [[EXT]]) |
| 220 | + ; CHECK: [[TRUNC:%[^ ]+]] = fptrunc <8 x float> [[RES]] to <8 x bfloat> |
| 221 | + ; CHECK: ret <8 x bfloat> [[TRUNC]] |
| 222 | + %res = call fast <8 x bfloat> @llvm.floor.v8bf16(<8 x bfloat> %src) |
| 223 | + ret <8 x bfloat> %res |
| 224 | +} |
| 225 | + |
| 226 | +; CHECK-LABEL: test_round |
| 227 | +define <8 x bfloat> @test_round(<8 x bfloat> %src) { |
| 228 | + ; CHECK: [[EXT:%[^ ]+]] = fpext <8 x bfloat> %src to <8 x float> |
| 229 | + ; CHECK: [[RES:%[^ ]+]] = call fast <8 x float> @llvm.round.v8f32(<8 x float> [[EXT]]) |
| 230 | + ; CHECK: [[TRUNC:%[^ ]+]] = fptrunc <8 x float> [[RES]] to <8 x bfloat> |
| 231 | + ; CHECK: ret <8 x bfloat> [[TRUNC]] |
| 232 | + %res = call fast <8 x bfloat> @llvm.round.v8bf16(<8 x bfloat> %src) |
| 233 | + ret <8 x bfloat> %res |
| 234 | +} |
| 235 | + |
| 236 | +; CHECK-LABEL: test_trunc |
| 237 | +define <8 x bfloat> @test_trunc(<8 x bfloat> %src) { |
| 238 | + ; CHECK: [[EXT:%[^ ]+]] = fpext <8 x bfloat> %src to <8 x float> |
| 239 | + ; CHECK: [[RES:%[^ ]+]] = call fast <8 x float> @llvm.trunc.v8f32(<8 x float> [[EXT]]) |
| 240 | + ; CHECK: [[TRUNC:%[^ ]+]] = fptrunc <8 x float> [[RES]] to <8 x bfloat> |
| 241 | + ; CHECK: ret <8 x bfloat> [[TRUNC]] |
| 242 | + %res = call fast <8 x bfloat> @llvm.trunc.v8bf16(<8 x bfloat> %src) |
| 243 | + ret <8 x bfloat> %res |
| 244 | +} |
| 245 | + |
| 246 | + |
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