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pkwasnie-intelpszymich
pkwasnie-intel
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pszymich
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optimize i64 built-in variables to i32
OpenCL represents built-in variables like `get_global_id` with generic type `size_t`, which translates to i64. This change adds a new optimization that simplifies built-in calculation to i32 if built-in's use has an assumption hinting that value fits in i32 range. (cherry picked from commit 53a472d)
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9 files changed

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‎IGC/AdaptorOCL/UnifyIROCL.cpp‎

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@@ -123,6 +123,7 @@ SPDX-License-Identifier: MIT
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#include "Compiler/Optimizer/OpenCLPasses/MinimumValidAddressChecking/MinimumValidAddressChecking.hpp"
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#include "Compiler/Optimizer/OpenCLPasses/Spv2dBlockIOResolution/Spv2dBlockIOResolution.hpp"
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#include "Compiler/Optimizer/OpenCLPasses/SpvSubgroupMMAResolution/SpvSubgroupMMAResolution.hpp"
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#include "Compiler/Optimizer/OpenCLPasses/ProcessBICodeAssumption/ProcessBICodeAssumption.hpp"
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#include "common/debug/Debug.hpp"
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#include "common/igc_regkeys.hpp"
@@ -356,6 +357,7 @@ static void CommonOCLBasedPasses(OpenCLProgramContext *pContext) {
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mpm.add(new SpvSubgroupMMAResolution());
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mpm.add(createProcessBICodeAssumptionPass());
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mpm.add(new PreBIImportAnalysis());
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mpm.add(createTimeStatsCounterPass(pContext, TIME_Unify_BuiltinImport, STATS_COUNTER_START));
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mpm.add(createBuiltInImportPass());

‎IGC/Compiler/InitializePasses.h‎

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@@ -294,3 +294,4 @@ void initializeInjectPrintfPass(llvm::PassRegistry &);
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void initializeWaveShuffleIndexSinkingPass(llvm::PassRegistry &);
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void initializeInstructionHoistingOptimizationPass(llvm::PassRegistry &);
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void initializeWaveBallotCSEPass(llvm::PassRegistry &);
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void initializeProcessBICodeAssumptionPass(llvm::PassRegistry &);

‎IGC/Compiler/Optimizer/OpenCLPasses/CMakeLists.txt‎

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@@ -44,6 +44,7 @@ add_subdirectory(OpenCLPrintf)
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add_subdirectory(PoisonFP64KernelsPass)
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add_subdirectory(PrepareInlineSamplerForBindless)
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add_subdirectory(PrivateMemory)
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add_subdirectory(ProcessBICodeAssumption)
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add_subdirectory(ProgramScopeConstants)
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add_subdirectory(RayTracing)
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add_subdirectory(ReplaceUnsupportedIntrinsics)
@@ -103,6 +104,7 @@ set(IGC_BUILD__SRC__Optimizer_OpenCLPasses_All
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${IGC_BUILD__SRC__OpenCLPasses_PoisonFP64KernelsPass}
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${IGC_BUILD__SRC__OpenCLPasses_PrepareInlineSamplerForBindless}
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${IGC_BUILD__SRC__OpenCLPasses_PrivateMemory}
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${IGC_BUILD__SRC__OpenCLPasses_ProcessBICodeAssumption}
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${IGC_BUILD__SRC__OpenCLPasses_ProgramScopeConstants}
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${IGC_BUILD__SRC__OpenCLPasses_Raytracing}
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${IGC_BUILD__SRC__OpenCLPasses_ReplaceUnsupportedIntrinsics}
@@ -167,6 +169,7 @@ set(IGC_BUILD__HDR__Optimizer_OpenCLPasses_All
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${IGC_BUILD__HDR__OpenCLPasses_OpenCLPrintf}
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${IGC_BUILD__HDR__OpenCLPasses_PrepareInlineSamplerForBindless}
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${IGC_BUILD__HDR__OpenCLPasses_PrivateMemory}
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${IGC_BUILD__HDR__OpenCLPasses_ProcessBICodeAssumption}
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${IGC_BUILD__HDR__OpenCLPasses_ProgramScopeConstants}
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${IGC_BUILD__HDR__OpenCLPasses_Raytracing}
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${IGC_BUILD__HDR__OpenCLPasses_ReplaceUnsupportedIntrinsics}
@@ -233,6 +236,7 @@ set(IGC_BUILD_Compiler_OpenCLPasses_Groups
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Compiler__OpenCLPasses_PoisonFP64KernelsPass
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Compiler__OpenCLPasses_PrepareInlineSamplerForBindless
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Compiler__OpenCLPasses_PrivateMemory
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Compiler__OpenCLPasses_ProcessBICodeAssumption
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Compiler__OpenCLPasses_ProgramScopeConstants
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Compiler__OpenCLPasses_Raytracing
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Compiler__OpenCLPasses_ReplaceUnsupportedIntrinsics

‎IGC/Compiler/Optimizer/OpenCLPasses/ProcessBICodeAssumption/CMakeLists.txt‎

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#=========================== begin_copyright_notice ============================
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#
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# Copyright (C) 2025 Intel Corporation
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#
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# SPDX-License-Identifier: MIT
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#
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#============================ end_copyright_notice =============================
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include_directories("${CMAKE_CURRENT_SOURCE_DIR}")
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set(IGC_BUILD__SRC__ProcessBICodeAssumption
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"${CMAKE_CURRENT_SOURCE_DIR}/ProcessBICodeAssumption.cpp"
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)
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set(IGC_BUILD__SRC__OpenCLPasses_ProcessBICodeAssumption ${IGC_BUILD__SRC__ProcessBICodeAssumption} PARENT_SCOPE)
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set(IGC_BUILD__HDR__ProcessBICodeAssumption
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"${CMAKE_CURRENT_SOURCE_DIR}/ProcessBICodeAssumption.hpp"
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)
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set(IGC_BUILD__HDR__OpenCLPasses_ProcessBICodeAssumption ${IGC_BUILD__HDR__ProcessBICodeAssumption} PARENT_SCOPE)
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igc_sg_register(
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Compiler__OpenCLPasses_ProcessBICodeAssumption
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"ProcessBICodeAssumption"
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FILES
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${IGC_BUILD__SRC__ProcessBICodeAssumption}
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${IGC_BUILD__HDR__ProcessBICodeAssumption}
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)

‎IGC/Compiler/Optimizer/OpenCLPasses/ProcessBICodeAssumption/ProcessBICodeAssumption.cpp‎

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/*========================== begin_copyright_notice ============================
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Copyright (C) 2025 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#include "Compiler/Optimizer/OpenCLPasses/ProcessBICodeAssumption/ProcessBICodeAssumption.hpp"
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#include "Compiler/IGCPassSupport.h"
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#include "common/LLVMWarningsPush.hpp"
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#include <llvm/IR/Function.h>
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#include <llvm/IR/InstVisitor.h>
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#include <llvm/IR/PatternMatch.h>
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#include "common/LLVMWarningsPop.hpp"
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#include "Compiler/CodeGenPublic.h"
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using namespace llvm;
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using namespace llvm::PatternMatch;
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using namespace IGC;
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// OpenCL standard defines built-in variables like get_global_id as size_t, which translates to i64, but in reality
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// many workloads use values that fit in i32. This pass checks if there are assumptions on built-in variables and adds
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// trunc/zext intructions to reflect that the upper 32 bits are not used. This helps instcombine to optimize code after
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// BIImport.
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class ProcessBICodeAssumption : public llvm::FunctionPass, public llvm::InstVisitor<ProcessBICodeAssumption> {
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public:
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static char ID;
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ProcessBICodeAssumption();
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virtual llvm::StringRef getPassName() const override { return "ProcessBICodeAssumption"; }
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virtual bool runOnFunction(Function &F) override;
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void visitCallInst(CallInst &I);
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private:
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bool matchCmp(ICmpInst::Predicate Pred, ConstantInt *CI);
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bool matchBuiltin(Instruction *I);
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void matchVectorPattern(Instruction *I);
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SmallPtrSet<Instruction *, 8> ToTruncate;
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};
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ProcessBICodeAssumption::ProcessBICodeAssumption() : FunctionPass(ID) {
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initializeProcessBICodeAssumptionPass(*PassRegistry::getPassRegistry());
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}
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bool ProcessBICodeAssumption::runOnFunction(Function &F) {
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ToTruncate.clear();
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visit(F);
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if (ToTruncate.empty())
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return false;
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// Insert trunc/zext for each matched builtin call.
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for (auto *I : ToTruncate) {
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IRBuilder<> Builder(I);
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Builder.SetInsertPoint(I->getNextNode());
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auto Trunc = Builder.CreateTrunc(I, Builder.getInt32Ty());
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auto Zext = Builder.CreateZExt(Trunc, Builder.getInt64Ty());
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for (auto It = I->use_begin(), E = I->use_end(); It != E; ) {
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auto Use = It++;
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if (Use->getUser() != Trunc)
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Use->set(Zext);
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}
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}
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return true;
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}
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void ProcessBICodeAssumption::visitCallInst(CallInst &CI) {
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Instruction *I = nullptr;
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ICmpInst::Predicate Pred;
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ConstantInt *Const = nullptr;
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// Look for assume:
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// %9 = icmp ult i64 %8, 2147483648
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// call void @llvm.assume(i1 %9)
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if (!match(&CI, m_Intrinsic<Intrinsic::assume>(m_ICmp(Pred, m_Instruction(I), m_ConstantInt(Const)))))
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return;
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if (!matchCmp(Pred, Const))
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return;
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if (matchBuiltin(I)) {
93+
ToTruncate.insert(I);
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return;
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}
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matchVectorPattern(I);
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}
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// Look for pattern with insertelement/extractelement:
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// %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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// %2 = insertelement <3 x i64> undef, i64 %1, i32 0
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// %3 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 1)
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// %4 = insertelement <3 x i64> %2, i64 %3, i32 1
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// %5 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 2)
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// %6 = insertelement <3 x i64> %4, i64 %5, i32 2
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// %7 = extractelement <3 x i64> %6, i32 0
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void ProcessBICodeAssumption::matchVectorPattern(Instruction *I) {
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Instruction *EE = I;
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// Optional select
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// %7 = extractelement <3 x i64> %6, i32 0
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// %8 = select i1 true, i64 %7, i64 0
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if (match(EE, m_Select(m_One(), m_Instruction(I), m_Value())))
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EE = I;
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Value *IE = nullptr, *NextIE = nullptr;
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ConstantInt *EConst = nullptr, *IConst = nullptr;
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if (!match(EE, m_ExtractElt(m_Value(IE), m_ConstantInt(EConst))))
122+
return;
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while (match(IE, m_InsertElt(m_Value(NextIE), m_Instruction(I), m_ConstantInt(IConst)))) {
125+
if (IConst->getZExtValue() == EConst->getZExtValue()) {
126+
if (matchBuiltin(I))
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ToTruncate.insert(I);
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return;
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}
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IE = NextIE;
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}
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}
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bool ProcessBICodeAssumption::matchCmp(ICmpInst::Predicate Pred, ConstantInt *CI) {
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switch (Pred) {
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case ICmpInst::ICMP_ULE:
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return CI->getZExtValue() <= llvm::APInt::getMaxValue(32).getZExtValue();
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case ICmpInst::ICMP_ULT:
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return CI->getZExtValue() <= llvm::APInt::getMaxValue(32).getZExtValue() + 1;
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case ICmpInst::ICMP_SLE:
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return CI->getZExtValue() <= llvm::APInt::getSignedMaxValue(32).getZExtValue();
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case ICmpInst::ICMP_SLT:
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return CI->getZExtValue() <= llvm::APInt::getSignedMaxValue(32).getZExtValue() + 1;
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default:
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return false;
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}
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}
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bool ProcessBICodeAssumption::matchBuiltin(Instruction *I) {
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if (auto CI = dyn_cast<CallInst>(I)) {
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return CI->getCalledFunction()->getName() == "_Z33__spirv_BuiltInGlobalInvocationIdi" ||
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CI->getCalledFunction()->getName() == "_Z29__spirv_BuiltInGlobalLinearIdv";
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}
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return false;
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}
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// Register pass to igc-opt
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#define PASS_FLAG "igc-process-bi-code-assumption"
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#define PASS_DESCRIPTION "Processes code assumptions assigned to builtin variables"
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#define PASS_CFG_ONLY false
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#define PASS_ANALYSIS false
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IGC_INITIALIZE_PASS_BEGIN(ProcessBICodeAssumption, PASS_FLAG, PASS_DESCRIPTION, PASS_CFG_ONLY, PASS_ANALYSIS)
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IGC_INITIALIZE_PASS_END(ProcessBICodeAssumption, PASS_FLAG, PASS_DESCRIPTION, PASS_CFG_ONLY, PASS_ANALYSIS)
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char ProcessBICodeAssumption::ID = 0;
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FunctionPass *IGC::createProcessBICodeAssumptionPass() { return new ProcessBICodeAssumption(); }

‎IGC/Compiler/Optimizer/OpenCLPasses/ProcessBICodeAssumption/ProcessBICodeAssumption.hpp‎

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@@ -0,0 +1,17 @@
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/*========================== begin_copyright_notice ============================
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Copyright (C) 2025 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#pragma once
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#include "common/LLVMWarningsPush.hpp"
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#include <llvm/Pass.h>
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#include "common/LLVMWarningsPop.hpp"
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namespace IGC {
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llvm::FunctionPass *createProcessBICodeAssumptionPass();
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} // namespace IGC

‎IGC/Compiler/tests/ProcessBICodeAssumption/assume-condition.ll‎

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2025 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; RUN: igc_opt --igc-process-bi-code-assumption -S < %s 2>&1 | FileCheck %s
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; Test different llvm.assume conditions.
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; CHECK-LABEL: @ule_4294967295
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = trunc i64 %1 to i32
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; CHECK-NEXT: %3 = zext i32 %2 to i64
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; CHECK-NEXT: %4 = icmp ule i64 %3, 4294967295
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; CHECK-NEXT: call void @llvm.assume(i1 %4)
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; CHECK-NEXT: ret void
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define void @ule_4294967295() {
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%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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%2 = icmp ule i64 %1, 4294967295
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @ule_4294967296
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = icmp ule i64 %1, 4294967296
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; CHECK-NEXT: call void @llvm.assume(i1 %2)
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; CHECK-NEXT: ret void
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define void @ule_4294967296() {
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%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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%2 = icmp ule i64 %1, 4294967296
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @ult_4294967296
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = trunc i64 %1 to i32
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; CHECK-NEXT: %3 = zext i32 %2 to i64
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; CHECK-NEXT: %4 = icmp ult i64 %3, 4294967296
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; CHECK-NEXT: call void @llvm.assume(i1 %4)
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; CHECK-NEXT: ret void
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define void @ult_4294967296() {
47+
%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
48+
%2 = icmp ult i64 %1, 4294967296
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @ult_4294967297
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = icmp ult i64 %1, 4294967297
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; CHECK-NEXT: call void @llvm.assume(i1 %2)
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; CHECK-NEXT: ret void
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define void @ult_4294967297() {
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%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
60+
%2 = icmp ult i64 %1, 4294967297
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @sle_2147483647
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = trunc i64 %1 to i32
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; CHECK-NEXT: %3 = zext i32 %2 to i64
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; CHECK-NEXT: %4 = icmp sle i64 %3, 2147483647
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; CHECK-NEXT: call void @llvm.assume(i1 %4)
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; CHECK-NEXT: ret void
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define void @sle_2147483647() {
73+
%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
74+
%2 = icmp sle i64 %1, 2147483647
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @sle_2147483648
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = icmp sle i64 %1, 2147483648
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; CHECK-NEXT: call void @llvm.assume(i1 %2)
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; CHECK-NEXT: ret void
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define void @sle_2147483648() {
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%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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%2 = icmp sle i64 %1, 2147483648
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call void @llvm.assume(i1 %2)
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ret void
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}
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; CHECK-LABEL: @slt_2147483648
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = trunc i64 %1 to i32
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; CHECK-NEXT: %3 = zext i32 %2 to i64
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; CHECK-NEXT: %4 = icmp slt i64 %3, 2147483648
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; CHECK-NEXT: call void @llvm.assume(i1 %4)
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; CHECK-NEXT: ret void
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define void @slt_2147483648() {
99+
%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
100+
%2 = icmp slt i64 %1, 2147483648
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call void @llvm.assume(i1 %2)
102+
ret void
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}
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; CHECK-LABEL: @slt_2147483649
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; CHECK-NEXT: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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; CHECK-NEXT: %2 = icmp slt i64 %1, 2147483649
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; CHECK-NEXT: call void @llvm.assume(i1 %2)
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; CHECK-NEXT: ret void
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define void @slt_2147483649() {
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%1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0)
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%2 = icmp slt i64 %1, 2147483649
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call void @llvm.assume(i1 %2)
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ret void
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}
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declare void @llvm.assume(i1)
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declare spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32)

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