Switch to using LLVMTargetMachine in VC.

Initialized GenX pass in BackendPlugin.

Change-Id: Ibff3c2e8a5235dfa4a9377deeae141b4d188b677

Author: dmitryryintel

IGC/VectorCompiler/include/vc/GenXCodeGen/GenXTarget.h

@@ -30,6 +30,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 extern "C" void LLVMInitializeGenXTargetInfo();
 extern "C" void LLVMInitializeGenXTarget();
 extern "C" void LLVMInitializeGenXTargetMC();
+extern "C" void LLVMInitializeGenXPasses();
 
 namespace llvm {
 void initializeGenX() {

IGC/VectorCompiler/lib/BackendPlugin/BackendPlugin.cpp

@@ -28,6 +28,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 static int initializeAll() {
   llvm::initializeGenX();
+  LLVMInitializeGenXPasses();
   return 0;
 }
 

IGC/VectorCompiler/lib/GenXCodeGen/GenXTargetMachine.cpp

@@ -60,6 +60,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "llvm/Analysis/Passes.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/LegacyPassManager.h"
 #include "llvm/IR/Verifier.h"
 #include "llvm/InitializePasses.h"
@@ -143,17 +144,38 @@ TargetTransformInfo GenXTargetMachine::getTargetTransformInfo(const Function &F)
 
 } // namespace llvm
 
+namespace {
+
+class GenXPassConfig : public TargetPassConfig {
+public:
+  GenXPassConfig(GenXTargetMachine &TM, PassManagerBase &PM)
+      : TargetPassConfig(TM, PM) {}
+
+  GenXTargetMachine &getGenXTargetMachine() const {
+    return getTM<GenXTargetMachine>();
+  }
+};
+
+} // namespace
+
 GenXTargetMachine::GenXTargetMachine(const Target &T, const Triple &TT,
                                      StringRef CPU, StringRef FS,
                                      const TargetOptions &Options,
                                      Optional<Reloc::Model> RM,
                                      Optional<CodeModel::Model> CM,
                                      CodeGenOpt::Level OL, bool Is64Bit)
-    : IGCLLVM::TargetMachine(T, getDL(Is64Bit), TT, CPU, FS, Options),
+    : IGCLLVM::LLVMTargetMachine(T, getDL(Is64Bit), TT, CPU, FS, Options,
+                                 RM ? RM.getValue() : Reloc::Model::Static,
+                                 CM ? CM.getValue() : CodeModel::Model::Small,
+                                 OL),
       Is64Bit(Is64Bit), Subtarget(TT, CPU, FS) {}
 
 GenXTargetMachine::~GenXTargetMachine() = default;
 
+TargetPassConfig *GenXTargetMachine::createPassConfig(PassManagerBase &PM) {
+  return new GenXPassConfig(*this, PM);
+}
+
 void GenXTargetMachine32::anchor() {}
 
 GenXTargetMachine32::GenXTargetMachine32(const Target &T, const Triple &TT,
@@ -183,6 +205,10 @@ extern "C" void LLVMInitializeGenXTarget() {
   RegisterTargetMachine<GenXTargetMachine64> Y(getTheGenXTarget64());
 }
 
+extern "C" void LLVMInitializeGenXPasses() {
+  llvm::initializeGenXPasses(*PassRegistry::getPassRegistry());
+}
+
 //===----------------------------------------------------------------------===//
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//

IGC/VectorCompiler/lib/GenXCodeGen/GenXTargetMachine.h

@@ -48,7 +48,7 @@ namespace llvm {
 class raw_pwrite_stream;
 class MachineModuleInfo;
 
-class GenXTargetMachine : public IGCLLVM::TargetMachine {
+class GenXTargetMachine : public IGCLLVM::LLVMTargetMachine {
   bool Is64Bit;
   GenXSubtarget Subtarget;
 
@@ -67,6 +67,8 @@ class GenXTargetMachine : public IGCLLVM::TargetMachine {
 
   void adjustPassManager(PassManagerBuilder &PMBuilder) override;
 
+  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+
   virtual const DataLayout *getDataLayout() const { return &DL; }
 
   virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override {

IGC/WrapperLLVM/include/llvmWrapper/Target/TargetMachine.h

@@ -69,6 +69,46 @@ namespace IGCLLVM {
         }
     };
 #endif
+
+#if LLVM_VERSION_MAJOR < 10
+    using LLVMTargetMachine = llvm::LLVMTargetMachine;
+#else
+    class LLVMTargetMachine : public llvm::LLVMTargetMachine
+    {
+    public:
+        using CodeGenFileType = llvm::CodeGenFileType;
+
+    protected:
+        LLVMTargetMachine(const llvm::Target &T, llvm::StringRef DataLayoutString,
+            const llvm::Triple &TargetTriple, llvm::StringRef CPU,
+            llvm::StringRef FS, const llvm::TargetOptions &Options,
+            llvm::Reloc::Model RM, llvm::CodeModel::Model CM,
+            llvm::CodeGenOpt::Level OL)
+            : llvm::LLVMTargetMachine(T, DataLayoutString, TargetTriple, CPU, FS,
+                  Options, RM, CM, OL) {}
+
+    private:
+        bool addPassesToEmitFile(llvm::PassManagerBase &PM,
+            llvm::raw_pwrite_stream &o, llvm::raw_pwrite_stream *pi,
+            llvm::CodeGenFileType FileType, bool DisableVerify,
+            llvm::MachineModuleInfoWrapperPass *MMIWP) override
+        {
+            llvm::MachineModuleInfo *MMI = nullptr;
+            if (MMIWP)
+                MMI = &MMIWP->getMMI();
+            return addPassesToEmitFile(PM, o, pi, FileType, DisableVerify, MMI);
+        }
+
+    public:
+        virtual bool addPassesToEmitFile(llvm::PassManagerBase &PM,
+            llvm::raw_pwrite_stream &o, llvm::raw_pwrite_stream *pi,
+            CodeGenFileType FileType, bool DisableVerify,
+            llvm::MachineModuleInfo *MMI)
+        {
+            return true;
+        }
+    };
+#endif
 } // namespace IGCLLVM
 
 #endif