Changes in code.

Author: AnBodrova

visa/GraphColor.cpp

@@ -9768,11 +9768,6 @@ int GlobalRA::coloringRegAlloc() {
 
     LivenessAnalysis liveAnalysis(*this, G4_GRF | G4_INPUT);
     liveAnalysis.computeLiveness();
-#ifndef DLL_MODE
-    if (stopAfter("Global_RA_liveness")) {
-      return VISA_EARLY_EXIT;
-    }
-#endif // DLL_MODE
     if (builder.getOption(vISA_dumpLiveness)) {
       liveAnalysis.dump();
     }

visa/RegAlloc.cpp

@@ -370,55 +370,6 @@ void LivenessAnalysis::detectNeverDefinedVarRows() {
   }
 }
 
-// #1 - (P166) sel (M1, 8) V2(0,0)<1> 0x1:d 0x0:d
-// #2 - (W) mov(M1, 8) V1(0,0)<1> 0x0:ud
-// #3 - (W) mov (M1, 1) V3 0x1:ud
-// #4 - add (M1, 8) V1(0,0)<1> V2(0,0)<1;1,0> V3(0,0)<0;1,0>
-//
-// In above 3d program, V1 is written once using WriteEnable and and once without
-// WriteEnable. A var must be treated as KILLED only for widest def. In this case,
-// widest def of V1 is one with WriteEnable set. Although def of V1 in inst# 4
-// writes all enabled channels, it may not be as wide as WriteEnable in inst#1.
-// Marking #4 as KILL allows RA to use same register for V1 and V3 which can be
-// incorrect if all but lowest channel are enabled. Because in this case lowest
-// channel data would be overwritten by V3 def.
-//
-// In this method, we gather all variables written with WriteEnable and refer to
-// this list when computing pseudo_kill. Note that WriteEnable takes effect only
-// in divergent context. In other words, for ESIMD target, all channels are enabled
-// at thread dispatch. Whereas for 3d, even entry BB is considered to be divergent.
-void LivenessAnalysis::collectNoMaskVars() {
-  for (auto bb : gra.kernel.fg) {
-    for (auto inst : *bb) {
-      if (!inst->isWriteEnableInst())
-        continue;
-
-      auto inDivergentContext = [&]() {
-        // 3d is always in divergent context
-        // ESIMD is divergent only in BBs that are explicitly divergent
-        return fg.getKernel()->getInt32KernelAttr(Attributes::ATTR_Target) ==
-                   VISA_3D ||
-               !bb->isAllLaneActive();
-      };
-
-      G4_Operand *opnd = nullptr;
-      if (livenessClass(G4_GRF))
-        opnd = inst->getDst();
-      else if (livenessClass(G4_FLAG))
-        opnd = inst->getCondMod();
-
-      if (opnd && opnd->getBase() && opnd->getBase()->isRegAllocPartaker() &&
-          inDivergentContext()) {
-        defWriteEnable.insert(opnd->getTopDcl());
-      }
-    }
-  }
-}
-
-bool LivenessAnalysis::doesVarNeedNoMaskForKill(const G4_Declare* dcl) const {
-  return defWriteEnable.count(dcl) == 0 ? false : true;
-}
-
 //
 // compute liveness of reg vars
 // Each reg var indicates a region within the register file. As such, the case
@@ -498,7 +449,6 @@ void LivenessAnalysis::computeLiveness() {
     def_out[i].clear();
   }
 
-  collectNoMaskVars();
   if (livenessClass(G4_GRF))
     detectNeverDefinedVarRows();
 
@@ -1161,9 +1111,6 @@ bool LivenessAnalysis::writeWholeRegion(const G4_BB *bb, const G4_INST *inst,
     return false;
   }
 
-  if (doesVarNeedNoMaskForKill(primaryDcl) && !inst->isWriteEnableInst())
-    return false;
-
   return true;
 }
 
@@ -1193,8 +1140,7 @@ void LivenessAnalysis::footprintDst(const G4_BB *bb, const G4_INST *i,
                                     BitSet *dstfootprint) const {
   if (dstfootprint && !(i->isPartialWrite()) &&
       ((bb->isAllLaneActive() || i->isWriteEnableInst() == true) ||
-       (gra.kernel.getInt32KernelAttr(Attributes::ATTR_Target) == VISA_3D &&
-        !doesVarNeedNoMaskForKill(opnd->getTopDcl())))) {
+       gra.kernel.getInt32KernelAttr(Attributes::ATTR_Target) == VISA_3D)) {
     // Bitwise OR left-bound/right-bound with dst footprint to indicate
     // bytes that are written in to
     opnd->updateFootPrint(*dstfootprint, true, *fg.builder);

visa/RegAlloc.h

@@ -61,7 +61,6 @@ class LivenessAnalysis {
       0; // the selected reg file kind for performing liveness
   const PointsToAnalysis &pointsToAnalysis;
   std::unordered_map<G4_Declare *, BitSet> neverDefinedRows;
-  std::unordered_set<const G4_Declare *> defWriteEnable;
 
   void computeGenKillandPseudoKill(G4_BB *bb, SparseBitSet &def_out,
                                    SparseBitSet &use_in, SparseBitSet &use_gen,
@@ -85,8 +84,6 @@ class LivenessAnalysis {
   static void footprintSrc(const G4_INST *i, G4_Operand *opnd,
                            BitSet *srcfootprint);
   void detectNeverDefinedVarRows();
-  void collectNoMaskVars();
-  bool doesVarNeedNoMaskForKill(const G4_Declare* dcl) const;
 
 public:
   GlobalRA &gra;