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admitricigcbot
admitric
authored and
igcbot
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Enable sinking of 2d block reads
Enable sinking of non-payload 2d block reads
1 parent a2fdff6 commit 4c0be51

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5 files changed

+282
-4
lines changed

5 files changed

+282
-4
lines changed

‎IGC/Compiler/CISACodeGen/CodeSinking.cpp‎

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1023,7 +1023,10 @@ namespace IGC {
10231023
for (auto &I : *BB)
10241024
{
10251025
GenIntrinsicInst* GII = dyn_cast<GenIntrinsicInst>(&I);
1026-
if (GII && GII->getIntrinsicID() == GenISAIntrinsic::GenISA_LSC2DBlockReadAddrPayload)
1026+
if (GII && (
1027+
GII->getIntrinsicID() == GenISAIntrinsic::GenISA_LSC2DBlockReadAddrPayload ||
1028+
GII->getIntrinsicID() == GenISAIntrinsic::GenISA_LSC2DBlockRead)
1029+
)
10271030
{
10281031
PrintDump(">> Loop has 2D block reads. Enabling loads rescheduling and sinking.\n");
10291032
return LoopSinkMode::SinkWhileRegpressureIsHigh;
@@ -1258,7 +1261,9 @@ namespace IGC {
12581261
Worthiness = LoopSinkWorthiness::Sink;
12591262
}
12601263

1261-
if (isa<LoadInst>(I))
1264+
// if LoadInst or GenISA_LSC2DBlockRead (standalone, non-payload allowed 2d load)
1265+
GenIntrinsicInst *GII = dyn_cast<GenIntrinsicInst>(I);
1266+
if (isa<LoadInst>(I) || (GII && GII->getIntrinsicID() == GenISAIntrinsic::GenISA_LSC2DBlockRead))
12621267
{
12631268
if (!AllowLoadSinking)
12641269
continue;
@@ -1282,8 +1287,8 @@ namespace IGC {
12821287

12831288
IGC_ASSERT(Worthiness == LoopSinkWorthiness::Unknown);
12841289

1285-
// 2d block loads are usually large
1286-
// So the sinking are beneficial when it's safe
1290+
// Handle payload 2d loads separately as they go together with auxilary intrinsics
1291+
// 2d block loads are usually large, so the sinking is beneficial when it's safe
12871292
if (AllowLoadSinking && IGC_IS_FLAG_ENABLED(LoopSinkEnable2dBlockReads))
12881293
tryCreate2dBlockReadGroupSinkingCandidate(I, L, SkipInstructions, SinkCandidates);
12891294

@@ -1346,6 +1351,25 @@ namespace IGC {
13461351
for (auto BI = BB->rbegin(), BE = BB->rend(); BI != BE; BI++)
13471352
{
13481353
Instruction *I = &*BI;
1354+
GenIntrinsicInst *GII = dyn_cast<GenIntrinsicInst>(I);
1355+
1356+
// If it's a non-payload 2d block load we can create candidate if it's safe to move
1357+
if (GII && GII->getIntrinsicID() == GenISAIntrinsic::GenISA_LSC2DBlockRead)
1358+
{
1359+
if (SkipInstructions.count(I))
1360+
continue;
1361+
SkipInstructions.insert(I);
1362+
1363+
if (!isSafeToLoopSinkLoad(I, L))
1364+
continue;
1365+
1366+
PrintDump("Found 2D block read to reschedule:\n");
1367+
PrintInstructionDump(I);
1368+
1369+
CurrentSinkCandidates.push_back(std::make_unique<Candidate>(I, I->getParent(), LoopSinkWorthiness::IntraLoopSink, I->getNextNode()));
1370+
}
1371+
1372+
// Handle possible payload 2d block loads separately
13491373
tryCreate2dBlockReadGroupSinkingCandidate(I, L, SkipInstructions, CurrentSinkCandidates);
13501374
}
13511375
}

‎IGC/Compiler/tests/CodeSinking/LoopSinking/2d-blockload-loopsched-typed-pointers.ll‎

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,8 @@ declare void @llvm.genx.GenISA.LSC2DBlockSetAddrPayloadField.p0i8.i32(i8*, i32,
1515

1616
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockReadAddrPayload.v32i16.p0i8(i8*, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
1717

18+
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
19+
1820

1921
define void @sink1(half addrspace(1)* %in0, <32 x i16> addrspace(1)* noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
2022

@@ -262,6 +264,74 @@ afterloop: ; preds = %loop
262264
ret void
263265
}
264266

267+
268+
define void @sink3_nonpayload(half addrspace(1)* %in0, <32 x i16> addrspace(1)* noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
269+
; CHECK-LABEL: @sink3_nonpayload(
270+
; CHECK: entry_preheader:
271+
272+
; CHECK: loop:
273+
274+
; CHECK: mul
275+
; CHECK: mul
276+
; CHECK: mul
277+
278+
; CHECK: [[SINK_LOAD:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR:%.*]], i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
279+
; CHECK: store <32 x i16> [[SINK_LOAD]], <32 x i16> addrspace(1)* [[ADDR:%.*]], align 64
280+
281+
; CHECK: [[SINK_LOAD2:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
282+
; CHECK: store <32 x i16> [[SINK_LOAD2]], <32 x i16> addrspace(1)* [[ADDR2:%.*]], align 64
283+
284+
; CHECK: [[SINK_LOAD3:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 64, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
285+
; CHECK: store <32 x i16> [[SINK_LOAD3]], <32 x i16> addrspace(1)* [[ADDR3:%.*]], align 64
286+
287+
; CHECK: br
288+
289+
290+
entry_preheader:
291+
%bc = bitcast <8 x i32> %r0 to <32 x i8>
292+
%ee_thread = extractelement <32 x i8> %bc, i32 8
293+
294+
%base_addr = ptrtoint half addrspace(1)* %in0 to i64
295+
296+
br label %loop
297+
298+
loop: ; preds = %loop, %entry_preheader
299+
%index = phi i32 [ 0, %entry_preheader ], [ %inc, %loop ]
300+
301+
%load = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
302+
303+
%x = add i32 %index, 5
304+
%y = add i32 %index, 6
305+
%z = add i32 %index, 12
306+
%x1 = mul i32 %index, %x
307+
308+
%load3 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 64, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
309+
310+
%load2 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
311+
312+
%y1 = mul i32 %x1, %y
313+
%z1 = mul i32 %y1, %z
314+
315+
316+
%addr = getelementptr <32 x i16>, <32 x i16> addrspace(1)* %out0, i32 %index
317+
store <32 x i16> %load, <32 x i16> addrspace(1)* %addr, align 64
318+
319+
%addr2 = getelementptr <32 x i16>, <32 x i16> addrspace(1)* %out0, i32 %x1
320+
store <32 x i16> %load2, <32 x i16> addrspace(1)* %addr2, align 64
321+
322+
%addr3 = getelementptr <32 x i16>, <32 x i16> addrspace(1)* %out0, i32 %y1
323+
store <32 x i16> %load3, <32 x i16> addrspace(1)* %addr3, align 64
324+
325+
%cmptmp = icmp ult i32 %index, %count
326+
%inc = add i32 %index, 1
327+
br i1 %cmptmp, label %loop, label %afterloop
328+
329+
afterloop: ; preds = %loop
330+
ret void
331+
}
332+
333+
334+
265335
attributes #0 = { argmemonly nounwind readonly willreturn }
266336

267337
!igc.functions = !{}

‎IGC/Compiler/tests/CodeSinking/LoopSinking/2d-blockload-loopsched.ll‎

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,8 @@ declare void @llvm.genx.GenISA.LSC2DBlockSetAddrPayloadField.p0.i32(ptr, i32, i3
1515

1616
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockReadAddrPayload.v32i16.p0(ptr, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
1717

18+
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
19+
1820

1921
define void @sink1(ptr addrspace(1) %in0, ptr addrspace(1) noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
2022

@@ -261,6 +263,71 @@ afterloop: ; preds = %loop
261263
ret void
262264
}
263265

266+
define void @sink3_nonpayload(ptr addrspace(1) %in0, ptr addrspace(1) noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
267+
; CHECK-LABEL: @sink3_nonpayload(
268+
; CHECK: entry_preheader:
269+
270+
; CHECK: loop:
271+
272+
; CHECK: mul
273+
; CHECK: mul
274+
; CHECK: mul
275+
276+
; CHECK: [[SINK_LOAD:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR:%.*]], i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
277+
; CHECK: store <32 x i16> [[SINK_LOAD]], ptr addrspace(1) [[ADDR:%.*]], align 64
278+
279+
; CHECK: [[SINK_LOAD2:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
280+
; CHECK: store <32 x i16> [[SINK_LOAD2]], ptr addrspace(1) [[ADDR2:%.*]], align 64
281+
282+
; CHECK: [[SINK_LOAD3:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 64, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
283+
; CHECK: store <32 x i16> [[SINK_LOAD3]], ptr addrspace(1) [[ADDR3:%.*]], align 64
284+
285+
; CHECK: br
286+
287+
288+
entry_preheader:
289+
%bc = bitcast <8 x i32> %r0 to <32 x i8>
290+
%ee_thread = extractelement <32 x i8> %bc, i32 8
291+
292+
%base_addr = ptrtoint ptr addrspace(1) %in0 to i64
293+
294+
br label %loop
295+
296+
loop: ; preds = %loop, %entry_preheader
297+
%index = phi i32 [ 0, %entry_preheader ], [ %inc, %loop ]
298+
299+
%load = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
300+
301+
%x = add i32 %index, 5
302+
%y = add i32 %index, 6
303+
%z = add i32 %index, 12
304+
%x1 = mul i32 %index, %x
305+
306+
%load3 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 64, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
307+
308+
%load2 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
309+
310+
%y1 = mul i32 %x1, %y
311+
%z1 = mul i32 %y1, %z
312+
313+
314+
%addr = getelementptr <32 x i16>, ptr addrspace(1) %out0, i32 %index
315+
store <32 x i16> %load, ptr addrspace(1) %addr, align 64
316+
317+
%addr2 = getelementptr <32 x i16>, ptr addrspace(1) %out0, i32 %x1
318+
store <32 x i16> %load2, ptr addrspace(1) %addr2, align 64
319+
320+
%addr3 = getelementptr <32 x i16>, ptr addrspace(1) %out0, i32 %y1
321+
store <32 x i16> %load3, ptr addrspace(1) %addr3, align 64
322+
323+
%cmptmp = icmp ult i32 %index, %count
324+
%inc = add i32 %index, 1
325+
br i1 %cmptmp, label %loop, label %afterloop
326+
327+
afterloop: ; preds = %loop
328+
ret void
329+
}
330+
264331
attributes #0 = { argmemonly nounwind readonly willreturn }
265332

266333
!igc.functions = !{}

‎IGC/Compiler/tests/CodeSinking/LoopSinking/2d-blockload-loopsink-typed-pointers.ll‎

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ declare void @spoiler(i8*) #0
1616

1717
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockReadAddrPayload.v32i16.p0i8(i8*, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
1818

19+
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
20+
1921
; Sink all 2d block reads to the second BB in the loop, because it contains all uses
2022
define void @sink1(half addrspace(1)* %in0, <32 x i16> addrspace(1)* noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
2123
; CHECK-LABEL: @sink1(
@@ -159,6 +161,63 @@ afterloop: ; preds = %loop2
159161
}
160162

161163

164+
; Sink all non-payload 2d block reads to the loop
165+
define void @sink3_nonpayload(half addrspace(1)* %in0, <32 x i16> addrspace(1)* noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
166+
; CHECK-LABEL: @sink3_nonpayload(
167+
; CHECK: entry_preheader:
168+
; CHECK: br label [[LOOP:%.*]]
169+
170+
; CHECK: loop:
171+
; CHECK: [[BASE_ADDR:%.*]] = ptrtoint half addrspace(1)* [[IN0:%.*]] to i64
172+
; CHECK: [[SINK_LOAD2:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
173+
; CHECK: br label %loop2
174+
175+
; CHECK: loop2:
176+
; CHECK: [[SINK_LOAD:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
177+
178+
179+
entry_preheader:
180+
%bc = bitcast <8 x i32> %r0 to <32 x i8>
181+
%ee_thread = extractelement <32 x i8> %bc, i32 8
182+
; %zext = zext i8 %ee_thread to i32
183+
184+
%base_addr = ptrtoint half addrspace(1)* %in0 to i64
185+
186+
%load = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
187+
%load2 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
188+
189+
br label %loop
190+
191+
loop: ; preds = %loop2, %entry_preheader
192+
%index = phi i32 [ 0, %entry_preheader ], [ %inc, %loop2 ]
193+
194+
%x = add i32 %index, 5
195+
%y = add i32 %index, 6
196+
%z = add i32 %index, 12
197+
%x1 = mul i32 %index, %x
198+
199+
%addr2 = getelementptr <32 x i16>, <32 x i16> addrspace(1)* %out0, i32 %x1
200+
store <32 x i16> %load2, <32 x i16> addrspace(1)* %addr2, align 64
201+
202+
%y1 = mul i32 %x1, %y
203+
%z1 = mul i32 %y1, %z
204+
205+
br label %loop2
206+
207+
loop2: ; preds = %loop
208+
%addr = getelementptr <32 x i16>, <32 x i16> addrspace(1)* %out0, i32 %index
209+
store <32 x i16> %load, <32 x i16> addrspace(1)* %addr, align 64
210+
211+
%cmptmp = icmp ult i32 %index, %count
212+
%inc = add i32 %index, 1
213+
br i1 %cmptmp, label %loop, label %afterloop
214+
215+
afterloop: ; preds = %loop2
216+
ret void
217+
}
218+
219+
220+
162221
; Don't sink 2d block reads, because they may alias (no noalias attr on store in the loop)
163222
define void @nosink1(half addrspace(1)* %in0, <32 x i16> addrspace(1)* %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
164223
; CHECK-LABEL: @nosink1(

‎IGC/Compiler/tests/CodeSinking/LoopSinking/2d-blockload-loopsink.ll‎

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ declare void @spoiler(ptr) #0
1616

1717
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockReadAddrPayload.v32i16.p0(ptr, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
1818

19+
declare <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i1, i1, i32) #0
20+
1921
; Sink all 2d block reads to the second BB in the loop, because it contains all uses
2022
define void @sink1(ptr addrspace(1) %in0, ptr addrspace(1) noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
2123
; CHECK-LABEL: @sink1(
@@ -159,6 +161,62 @@ afterloop: ; preds = %loop2
159161
}
160162

161163

164+
; Sink all non-payload 2d block reads to the loop
165+
define void @sink3_nonpayload(ptr addrspace(1) %in0, ptr addrspace(1) noalias %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
166+
; CHECK-LABEL: @sink3_nonpayload(
167+
; CHECK: entry_preheader:
168+
; CHECK: br label [[LOOP:%.*]]
169+
170+
; CHECK: loop:
171+
; CHECK: [[BASE_ADDR:%.*]] = ptrtoint ptr addrspace(1) [[IN0:%.*]] to i64
172+
; CHECK: [[SINK_LOAD2:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
173+
; CHECK: br label %loop2
174+
175+
; CHECK: loop2:
176+
; CHECK: [[SINK_LOAD:%.*]] = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 [[BASE_ADDR]], i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
177+
178+
179+
entry_preheader:
180+
%bc = bitcast <8 x i32> %r0 to <32 x i8>
181+
%ee_thread = extractelement <32 x i8> %bc, i32 8
182+
; %zext = zext i8 %ee_thread to i32
183+
184+
%base_addr = ptrtoint ptr addrspace(1) %in0 to i64
185+
186+
%load = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 0, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
187+
%load2 = call <32 x i16> @llvm.genx.GenISA.LSC2DBlockRead.v32i16(i64 %base_addr, i32 127, i32 1023, i32 127, i32 32, i32 0, i32 16, i32 16, i32 16, i32 2, i1 false, i1 false, i32 4)
188+
189+
br label %loop
190+
191+
loop: ; preds = %loop2, %entry_preheader
192+
%index = phi i32 [ 0, %entry_preheader ], [ %inc, %loop2 ]
193+
194+
%x = add i32 %index, 5
195+
%y = add i32 %index, 6
196+
%z = add i32 %index, 12
197+
%x1 = mul i32 %index, %x
198+
199+
%addr2 = getelementptr <32 x i16>, ptr addrspace(1) %out0, i32 %x1
200+
store <32 x i16> %load2, <32 x i16> addrspace(1)* %addr2, align 64
201+
202+
%y1 = mul i32 %x1, %y
203+
%z1 = mul i32 %y1, %z
204+
205+
br label %loop2
206+
207+
loop2: ; preds = %loop
208+
%addr = getelementptr <32 x i16>, ptr addrspace(1) %out0, i32 %index
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store <32 x i16> %load, <32 x i16> addrspace(1)* %addr, align 64
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%cmptmp = icmp ult i32 %index, %count
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%inc = add i32 %index, 1
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br i1 %cmptmp, label %loop, label %afterloop
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afterloop: ; preds = %loop2
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ret void
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}
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162220
; Don't sink 2d block reads, because they may alias (no noalias attr on store in the loop)
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define void @nosink1(ptr addrspace(1) %in0, ptr addrspace(1) %out0, i32 %count, i32 %offsetIn0, <8 x i32> %r0) {
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; CHECK-LABEL: @nosink1(

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