Skip to content

Commit 4e31572

Browse files
pratikasharigcbot
authored andcommitted
Minor refactoring change
Minor refactoring change
1 parent 4b7254d commit 4e31572

File tree

3 files changed

+23
-13
lines changed

3 files changed

+23
-13
lines changed

visa/HWCaps.inc

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -939,4 +939,5 @@ bool needTGMDoubleFenceWA() const {
939939
bool useDynamicAddrForExDesc() const {
940940
return getOption(vISA_dynamicAddrForExDescInLscSend);
941941
}
942+
942943
// end HW capabilities

visa/Optimizer.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -966,6 +966,8 @@ int Optimizer::optimization() {
966966
return VISA_SPILL;
967967
}
968968

969+
970+
969971
runPass(PI_removeLifetimeOps);
970972

971973
// HW workaround after RA
@@ -1321,7 +1323,6 @@ void Optimizer::removePseudoMov() {
13211323
}
13221324
}
13231325
}
1324-
13251326
void Optimizer::FoldAddrImmediate() {
13261327
AddrSubReg_Node *addrRegInfo =
13271328
new AddrSubReg_Node[builder.getNumAddrRegisters()];

visa/VisaToG4/TranslateSend3D.cpp

Lines changed: 20 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -195,19 +195,21 @@ int IR_Builder::translateVISASampleInfoInst(VISA_Exec_Size executionSize,
195195
bool preEmption = forceSamplerHeader();
196196
bool forceSplitSend = shouldForceSplitSend(surface);
197197
bool useHeader = true;
198+
bool forceHeader = false;
198199
// SAMPLEINFO has 0 parameters so its only header
199200

200201
unsigned int numRows = 1;
201202

202203
G4_Declare *msg = NULL;
203204
G4_SrcRegRegion *m0 = NULL;
204205

205-
if (!useFakeHeader || forceSplitSend || preEmption) {
206+
if (!useFakeHeader || forceSplitSend || preEmption || forceHeader) {
206207
msg = getSamplerHeader(false /*isBindlessSampler*/,
207208
false /*samperIndexGE16*/);
208209

209210
unsigned int secondDword = chMask.getHWEncoding() << 12;
210211

212+
211213
G4_Imm *immOpndSecondDword = createImm(secondDword, Type_UD);
212214

213215
// mov (1) msg(0,2) immOpndSecondDword
@@ -321,6 +323,7 @@ int IR_Builder::translateVISAResInfoInst(
321323
unsigned int secondDword = 0;
322324
secondDword |= (chMask.getHWEncoding() << 12);
323325

326+
324327
G4_Imm *immOpndSecondDword = createImm(secondDword, Type_UD);
325328

326329
// mov (1) msg(0,2) immOpndSecondDword
@@ -1763,17 +1766,21 @@ static G4_Operand *createSampleHeader(IR_Builder *builder, G4_Declare *header,
17631766
unsigned int secondDword = createSampleHeader0Dot2(
17641767
actualop, pixelNullMask, aoffimmiVal, srcChannel, builder);
17651768

1769+
17661770
G4_Imm *immOpndSecondDword = builder->createImm(secondDword, Type_UD);
17671771
G4_DstRegRegion *payloadDstRgn =
17681772
builder->createDst(header->getRegVar(), 0, 2, 1, Type_UD);
1773+
G4_INST *headerInst = nullptr;
17691774
if (aoffimmi->isImm()) {
17701775
// mov (1) payload(0,2) immOpndSecondDword
1771-
builder->createMov(g4::SIMD1, payloadDstRgn, immOpndSecondDword,
1772-
InstOpt_WriteEnable, true);
1776+
headerInst =
1777+
builder->createMov(g4::SIMD1, payloadDstRgn, immOpndSecondDword,
1778+
InstOpt_WriteEnable, true);
17731779
} else {
17741780
// or (1) payload(0,2) aoffimmi<0;1,0>:uw immOpndSeconDword
1775-
builder->createBinOp(G4_or, g4::SIMD1, payloadDstRgn, aoffimmi,
1776-
immOpndSecondDword, InstOpt_WriteEnable, true);
1781+
headerInst =
1782+
builder->createBinOp(G4_or, g4::SIMD1, payloadDstRgn, aoffimmi,
1783+
immOpndSecondDword, InstOpt_WriteEnable, true);
17771784
}
17781785

17791786
if (sampler != nullptr) {
@@ -2364,10 +2371,10 @@ int IR_Builder::translateVISASampler3DInst(
23642371
bool nonZeroAoffImmi =
23652372
!(aoffimmi->isImm() && aoffimmi->asImm()->getInt() == 0);
23662373
bool simd16HFReturn = FP16Return && execSize == 16;
2367-
if (needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
2374+
if (useHeader ||
2375+
needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
23682376
needHeaderForChannels, isBindlessSampler(sampler),
2369-
!pairedSurface->isNullReg(),
2370-
simd16HFReturn) ||
2377+
!pairedSurface->isNullReg(), simd16HFReturn) ||
23712378
samplerHeaderPreemptionWA()) {
23722379
useHeader = true;
23732380
++numRows;
@@ -2503,10 +2510,10 @@ int IR_Builder::translateVISALoad3DInst(
25032510
bool nonZeroAoffImmi =
25042511
!(aoffimmi->isImm() && aoffimmi->asImm()->getInt() == 0);
25052512
bool simd16HFReturn = halfReturn && execSize == 16;
2506-
if (needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
2513+
if (useHeader ||
2514+
needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
25072515
needHeaderForChannels, false,
2508-
!pairedSurface->isNullReg(),
2509-
simd16HFReturn)) {
2516+
!pairedSurface->isNullReg(), simd16HFReturn)) {
25102517
useHeader = true;
25112518
++numRows;
25122519
}
@@ -2612,7 +2619,8 @@ int IR_Builder::translateVISAGather3dInst(
26122619
channelMask.getSingleChannel() != VISA_3D_GATHER4_CHANNEL_R;
26132620
bool simd16HFReturn = FP16Return && execSize == 16;
26142621

2615-
if (needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
2622+
if (useHeader ||
2623+
needSamplerHeader(this, pixelNullMask, nonZeroAoffImmi,
26162624
needHeaderForChannels, isBindlessSampler(sampler),
26172625
!pairedSurface->isNullReg(), simd16HFReturn) ||
26182626
samplerHeaderPreemptionWA()) {

0 commit comments

Comments
 (0)