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michalpaszkowski
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Adjust SPIR-V LITs to work on LLVM 16 with both opaque and typed pointers
Adjustments to RUN lines to make tests run on LLVM 16 with both opaque and typed pointers. By default, LLVM 16 tools emit opaque pointers, while IGC pointer typing can be controlled with a flag. This change ensures the typing is enabled/disabled explicitly.
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‎IGC/Compiler/tests/lit.cfg.py‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,9 @@
5555
if llvm_version <= 15:
5656
config.available_features.add('llvm-15-or-older')
5757

58+
if llvm_version >= 15:
59+
config.available_features.add('llvm-15-plus')
60+
5861
if llvm_version >= 16:
5962
config.available_features.add('llvm-16-plus')
6063

‎IGC/ocloc_tests/DebugInfo/Dwarf/generate_enum.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,14 +10,14 @@
1010

1111
; UNSUPPORTED: sys32
1212

13-
; REQUIRES: regkeys, oneapi-readelf, llvm-16-plus
13+
; REQUIRES: regkeys, oneapi-readelf, llvm-15-plus
1414

1515
; LLVM with opaque pointers:
1616
; RUN: llvm-as -opaque-pointers=1 %s -o %t
1717
; RUN: ocloc compile -llvm_input -file %t -device dg2 -options "-g -cl-opt-disable -igc_opts 'EnableOpaquePointersBackend=1, ElfDumpEnable=1, DumpUseShorterName=0, DebugDumpNamePrefix=%t_'"
1818
; RUN: oneapi-readelf --debug-dump %t_OCL_simd32_foo.elf | FileCheck %s
1919

20-
; LLVM with typed pointers:
20+
; LLVM with typed pointers/default pointer typing:
2121
; RUN: llvm-as -opaque-pointers=0 %s -o %t
2222
; RUN: ocloc compile -llvm_input -file %t -device dg2 -options "-g -cl-opt-disable -igc_opts 'ElfDumpEnable=1, DumpUseShorterName=0, DebugDumpNamePrefix=%t_'"
2323
; RUN: oneapi-readelf --debug-dump %t_OCL_simd32_foo.elf | FileCheck %s

‎IGC/ocloc_tests/SPIRV-Asm/GroupAndSubgroupInstructions-typed-pointers.spvasm‎

Lines changed: 147 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,147 @@
1+
; Generated with:
2+
; source.cl:
3+
; void foo(int x, int2 coord, uint c, short s, float f, size_t n,
4+
; __global uint* p, read_write image2d_t image) {
5+
; work_group_all(x);
6+
; work_group_any(x);
7+
; work_group_broadcast(x, n);
8+
; sub_group_barrier(CLK_LOCAL_MEM_FENCE, memory_scope_sub_group);
9+
; sub_group_all(x);
10+
; sub_group_any(x);
11+
; sub_group_broadcast(x, c);
12+
; sub_group_reduce_add(x);
13+
; sub_group_reduce_add(f);
14+
; sub_group_reduce_min(x);
15+
; sub_group_reduce_min(c);
16+
; sub_group_reduce_min(f);
17+
; sub_group_reduce_max(x);
18+
; sub_group_reduce_max(c);
19+
; sub_group_reduce_max(f);
20+
; intel_sub_group_shuffle(x, c);
21+
; intel_sub_group_shuffle_down(x, x, c);
22+
; intel_sub_group_shuffle_up(x, x, c);
23+
; intel_sub_group_shuffle_xor(x, c);
24+
; intel_sub_group_block_read(p);
25+
; intel_sub_group_block_write(p, c);
26+
; intel_sub_group_block_read(image, coord);
27+
; intel_sub_group_block_write(image, coord, c);
28+
; }
29+
; clang -cc1 -O2 -triple spir -finclude-default-header -cl-ext=+all source.cl -emit-llvm-bc -o tmp.bc
30+
; llvm-spirv tmp.bc --spirv-ext=+all -o tmp.spv
31+
; spirv-dis tmp.spv -o llvm-spirv/test/GroupAndSubgroupInstructions.spvasm
32+
33+
; REQUIRES: spirv-as, regkeys, dg2-supported, llvm-15-or-older
34+
; RUN: spirv-as %s --target-env spv1.0 -o %t.spv
35+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
36+
; CHECK: declare spir_func i1 @_Z16__spirv_GroupAllib(i32{{.*}}, i1{{.*}}) #[[#Attrs:]]
37+
; CHECK: declare spir_func i1 @_Z16__spirv_GroupAnyib(i32{{.*}}, i1{{.*}}) #[[#Attrs]]
38+
; CHECK: declare spir_func i32 @_Z22__spirv_GroupBroadcastiii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
39+
; CHECK: declare spir_func void @_Z22__spirv_ControlBarrieriii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
40+
; CHECK: declare spir_func i32 @_Z17__spirv_GroupIAddiii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
41+
; CHECK: declare spir_func float @_Z17__spirv_GroupFAddiif(i32{{.*}}, i32{{.*}}, float{{.*}}) #[[#Attrs]]
42+
; CHECK: declare spir_func i32 @_Z17__spirv_GroupSMiniii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
43+
; CHECK: declare spir_func i32 @_Z17__spirv_GroupUMiniij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
44+
; CHECK: declare spir_func float @_Z17__spirv_GroupFMiniif(i32{{.*}}, i32{{.*}}, float{{.*}}) #[[#Attrs]]
45+
; CHECK: declare spir_func i32 @_Z17__spirv_GroupSMaxiii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
46+
; CHECK: declare spir_func i32 @_Z17__spirv_GroupUMaxiij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
47+
; CHECK: declare spir_func float @_Z17__spirv_GroupFMaxiif(i32{{.*}}, i32{{.*}}, float{{.*}}) #[[#Attrs]]
48+
; CHECK: declare spir_func i32 @_Z28__spirv_SubgroupShuffleINTELij(i32{{.*}}, i32{{.*}}) #[[#Attrs]]
49+
; CHECK: declare spir_func i32 @_Z32__spirv_SubgroupShuffleDownINTELiij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
50+
; CHECK: declare spir_func i32 @_Z30__spirv_SubgroupShuffleUpINTELiij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
51+
; CHECK: declare spir_func i32 @_Z31__spirv_SubgroupShuffleXorINTELij(i32{{.*}}, i32{{.*}}) #[[#Attrs]]
52+
; CHECK: declare spir_func i32 @_Z35__spirv_SubgroupBlockReadINTEL_RintPU3AS1Kj(i32 addrspace(1)*{{.*}}) #[[#Attrs]]
53+
; CHECK: declare spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(i32 addrspace(1)*{{.*}}, i32{{.*}}) #[[#Attrs]]
54+
; CHECK: declare spir_func i32 @_Z40__spirv_SubgroupImageBlockReadINTEL_RintPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_i(%spirv.Image._void_1_0_0_0_0_0_2 addrspace(1)*{{.*}}, <2 x i32>{{.*}}) #[[#Attrs]]
55+
; CHECK: declare spir_func void @_Z36__spirv_SubgroupImageBlockWriteINTELPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_ij(%spirv.Image._void_1_0_0_0_0_0_2 addrspace(1)*{{.*}}, <2 x i32>{{.*}}, i32{{.*}}) #[[#Attrs]]
56+
57+
; CHECK: attributes #[[#Attrs]] =
58+
; CHECK-SAME: convergent
59+
60+
; SPIR-V
61+
; Version: 1.0
62+
; Generator: Khronos LLVM/SPIR-V Translator; 14
63+
; Bound: 60
64+
; Schema: 0
65+
OpCapability Addresses
66+
OpCapability Linkage
67+
OpCapability Kernel
68+
OpCapability ImageBasic
69+
OpCapability ImageReadWrite
70+
OpCapability Groups
71+
OpCapability Int16
72+
OpCapability GenericPointer
73+
OpCapability SubgroupShuffleINTEL
74+
OpCapability SubgroupBufferBlockIOINTEL
75+
OpCapability SubgroupImageBlockIOINTEL
76+
OpExtension "SPV_INTEL_subgroups"
77+
%1 = OpExtInstImport "OpenCL.std"
78+
OpMemoryModel Physical32 OpenCL
79+
OpSource OpenCL_C 200000
80+
OpDecorate %s FuncParamAttr Sext
81+
OpDecorate %dst FuncParamAttr NoCapture
82+
OpDecorate %src FuncParamAttr NoCapture
83+
OpDecorate %e FuncParamAttr NoCapture
84+
OpDecorate %foo LinkageAttributes "foo" Export
85+
%uint = OpTypeInt 32 0
86+
%ushort = OpTypeInt 16 0
87+
%uint_0 = OpConstant %uint 0
88+
%uint_2 = OpConstant %uint 2
89+
%uint_1 = OpConstant %uint 1
90+
%uint_3 = OpConstant %uint 3
91+
%uint_272 = OpConstant %uint 272
92+
%void = OpTypeVoid
93+
%v2uint = OpTypeVector %uint 2
94+
%float = OpTypeFloat 32
95+
%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
96+
%_ptr_Workgroup_uint = OpTypePointer Workgroup %uint
97+
%Event = OpTypeEvent
98+
%_ptr_Generic_Event = OpTypePointer Generic %Event
99+
%11 = OpTypeImage %void 2D 0 0 0 0 Unknown ReadWrite
100+
%12 = OpTypeFunction %void %uint %v2uint %uint %ushort %float %uint %_ptr_CrossWorkgroup_uint %_ptr_Workgroup_uint %_ptr_CrossWorkgroup_uint %_ptr_Generic_Event %11
101+
%bool = OpTypeBool
102+
%foo = OpFunction %void None %12
103+
%x = OpFunctionParameter %uint
104+
%coord = OpFunctionParameter %v2uint
105+
%c = OpFunctionParameter %uint
106+
%s = OpFunctionParameter %ushort
107+
%f = OpFunctionParameter %float
108+
%n = OpFunctionParameter %uint
109+
%p = OpFunctionParameter %_ptr_CrossWorkgroup_uint
110+
%dst = OpFunctionParameter %_ptr_Workgroup_uint
111+
%src = OpFunctionParameter %_ptr_CrossWorkgroup_uint
112+
%e = OpFunctionParameter %_ptr_Generic_Event
113+
%image = OpFunctionParameter %11
114+
%entry = OpLabel
115+
%28 = OpINotEqual %bool %x %uint_0
116+
%call20 = OpGroupAll %bool %uint_2 %28
117+
%call = OpSelect %uint %call20 %uint_1 %uint_0
118+
%33 = OpINotEqual %bool %x %uint_0
119+
%call121 = OpGroupAny %bool %uint_2 %33
120+
%call1 = OpSelect %uint %call121 %uint_1 %uint_0
121+
%call2 = OpGroupBroadcast %uint %uint_2 %x %n
122+
OpControlBarrier %uint_3 %uint_3 %uint_272
123+
%39 = OpINotEqual %bool %x %uint_0
124+
%call322 = OpGroupAll %bool %uint_3 %39
125+
%call3 = OpSelect %uint %call322 %uint_1 %uint_0
126+
%42 = OpINotEqual %bool %x %uint_0
127+
%call423 = OpGroupAny %bool %uint_3 %42
128+
%call4 = OpSelect %uint %call423 %uint_1 %uint_0
129+
%call5 = OpGroupBroadcast %uint %uint_3 %x %c
130+
%call6 = OpGroupIAdd %uint %uint_3 Reduce %x
131+
%call7 = OpGroupFAdd %float %uint_3 Reduce %f
132+
%call8 = OpGroupSMin %uint %uint_3 Reduce %x
133+
%call9 = OpGroupUMin %uint %uint_3 Reduce %c
134+
%call10 = OpGroupFMin %float %uint_3 Reduce %f
135+
%call11 = OpGroupSMax %uint %uint_3 Reduce %x
136+
%call12 = OpGroupUMax %uint %uint_3 Reduce %c
137+
%call13 = OpGroupFMax %float %uint_3 Reduce %f
138+
%call14 = OpSubgroupShuffleINTEL %uint %x %c
139+
%call15 = OpSubgroupShuffleDownINTEL %uint %x %x %c
140+
%call16 = OpSubgroupShuffleUpINTEL %uint %x %x %c
141+
%call17 = OpSubgroupShuffleXorINTEL %uint %x %c
142+
%call18 = OpSubgroupBlockReadINTEL %uint %p
143+
OpSubgroupBlockWriteINTEL %p %c
144+
%call19 = OpSubgroupImageBlockReadINTEL %uint %image %coord
145+
OpSubgroupImageBlockWriteINTEL %image %coord %c
146+
OpReturn
147+
OpFunctionEnd

‎IGC/ocloc_tests/SPIRV-Asm/GroupAndSubgroupInstructions.spvasm‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,10 @@
3030
; llvm-spirv tmp.bc --spirv-ext=+all -o tmp.spv
3131
; spirv-dis tmp.spv -o llvm-spirv/test/GroupAndSubgroupInstructions.spvasm
3232

33-
; REQUIRES: spirv-as, regkeys, dg2-supported
33+
; REQUIRES: spirv-as, regkeys, dg2-supported, llvm-16-plus
3434
; RUN: spirv-as %s --target-env spv1.0 -o %t.spv
35-
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
35+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'EnableOpaquePointersBackend=1,ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
36+
3637
; CHECK: declare spir_func i1 @_Z16__spirv_GroupAllib(i32{{.*}}, i1{{.*}}) #[[#Attrs:]]
3738
; CHECK: declare spir_func i1 @_Z16__spirv_GroupAnyib(i32{{.*}}, i1{{.*}}) #[[#Attrs]]
3839
; CHECK: declare spir_func i32 @_Z22__spirv_GroupBroadcastiii(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
@@ -49,11 +50,10 @@
4950
; CHECK: declare spir_func i32 @_Z32__spirv_SubgroupShuffleDownINTELiij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
5051
; CHECK: declare spir_func i32 @_Z30__spirv_SubgroupShuffleUpINTELiij(i32{{.*}}, i32{{.*}}, i32{{.*}}) #[[#Attrs]]
5152
; CHECK: declare spir_func i32 @_Z31__spirv_SubgroupShuffleXorINTELij(i32{{.*}}, i32{{.*}}) #[[#Attrs]]
52-
; CHECK: declare spir_func i32 @_Z35__spirv_SubgroupBlockReadINTEL_RintPU3AS1Kj(i32 addrspace(1)*{{.*}}) #[[#Attrs]]
53-
; CHECK: declare spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(i32 addrspace(1)*{{.*}}, i32{{.*}}) #[[#Attrs]]
54-
; CHECK: declare spir_func i32 @_Z40__spirv_SubgroupImageBlockReadINTEL_RintPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_i(%spirv.Image._void_1_0_0_0_0_0_2 addrspace(1)*{{.*}}, <2 x i32>{{.*}}) #[[#Attrs]]
55-
; CHECK: declare spir_func void @_Z36__spirv_SubgroupImageBlockWriteINTELPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_ij(%spirv.Image._void_1_0_0_0_0_0_2 addrspace(1)*{{.*}}, <2 x i32>{{.*}}, i32{{.*}}) #[[#Attrs]]
56-
53+
; CHECK: declare spir_func i32 @_Z35__spirv_SubgroupBlockReadINTEL_RintPU3AS1Kj(ptr addrspace(1){{.*}}) #[[#Attrs]]
54+
; CHECK: declare spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(ptr addrspace(1){{.*}}, i32{{.*}}) #[[#Attrs]]
55+
; CHECK: declare spir_func i32 @_Z40__spirv_SubgroupImageBlockReadINTEL_RintPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_i(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 2){{.*}}, <2 x i32>{{.*}}) #[[#Attrs]]
56+
; CHECK: declare spir_func void @_Z36__spirv_SubgroupImageBlockWriteINTELPU3AS133__spirv_Image__void_1_0_0_0_0_0_2Dv2_ij(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 2){{.*}}, <2 x i32>{{.*}}, i32{{.*}}) #[[#Attrs]]
5757
; CHECK: attributes #[[#Attrs]] =
5858
; CHECK-SAME: convergent
5959

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertPtrToU_narrowing-typed-pointers.spvasm‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-15-or-older
2+
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
3+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
4+
OpCapability Addresses
5+
OpCapability Kernel
6+
OpCapability Int16
7+
OpMemoryModel Physical32 OpenCL
8+
OpEntryPoint Kernel %1 "testNarrowingPtrToU"
9+
OpName %a "a"
10+
OpName %res "res"
11+
OpName %entry "entry"
12+
%uint = OpTypeInt 32 0
13+
%ushort = OpTypeInt 16 0
14+
%void = OpTypeVoid
15+
%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
16+
%_ptr_CrossWorkgroup_ushort = OpTypePointer CrossWorkgroup %ushort
17+
%17 = OpTypeFunction %void %_ptr_CrossWorkgroup_uint %_ptr_CrossWorkgroup_ushort
18+
%1 = OpFunction %void None %17
19+
%a = OpFunctionParameter %_ptr_CrossWorkgroup_uint
20+
%res = OpFunctionParameter %_ptr_CrossWorkgroup_ushort
21+
%entry = OpLabel
22+
%18 = OpConvertPtrToU %ushort %a
23+
OpStore %res %18 Aligned 2
24+
OpReturn
25+
OpFunctionEnd
26+
27+
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
28+
; following is original self-check:
29+
; ptrtoint ptr addrspace(1) %a to i16
30+
31+
; CHECK: ptrtoint i32 addrspace(1)* %a to i16

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertPtrToU_narrowing.spvasm‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,12 @@
1-
; REQUIRES: regkeys, spirv-as, dg2-supported
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-16-plus
2+
23
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
4+
5+
; LLVM with opaque pointers:
6+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'EnableOpaquePointersBackend=1,ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
7+
; LLVM with typed pointers/default pointer typing:
38
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
9+
410
OpCapability Addresses
511
OpCapability Kernel
612
OpCapability Int16
@@ -24,8 +30,4 @@
2430
OpReturn
2531
OpFunctionEnd
2632

27-
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
28-
; following is original self-check:
29-
; ptrtoint ptr addrspace(1) %a to i16
30-
31-
; CHECK: ptrtoint i32 addrspace(1)* %a to i16
33+
; CHECK: ptrtoint {{ptr|i32}} addrspace(1){{.*}} %a to i16

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertPtrToU_widening-typed-pointers.spvasm‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-15-or-older
2+
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
3+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
4+
OpCapability Addresses
5+
OpCapability Kernel
6+
OpCapability Int64
7+
OpMemoryModel Physical32 OpenCL
8+
OpEntryPoint Kernel %1 "testWideningPtrToU"
9+
OpName %a "a"
10+
OpName %res "res"
11+
OpName %entry "entry"
12+
%uint = OpTypeInt 32 0
13+
%ulong = OpTypeInt 64 0
14+
%void = OpTypeVoid
15+
%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
16+
%_ptr_CrossWorkgroup_ulong = OpTypePointer CrossWorkgroup %ulong
17+
%17 = OpTypeFunction %void %_ptr_CrossWorkgroup_uint %_ptr_CrossWorkgroup_ulong
18+
%1 = OpFunction %void None %17
19+
%a = OpFunctionParameter %_ptr_CrossWorkgroup_uint
20+
%res = OpFunctionParameter %_ptr_CrossWorkgroup_ulong
21+
%entry = OpLabel
22+
%18 = OpConvertPtrToU %ulong %a
23+
OpStore %res %18 Aligned 8
24+
OpReturn
25+
OpFunctionEnd
26+
27+
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
28+
; following is original self-check:
29+
; ptrtoint ptr addrspace(1) %a to i64
30+
31+
; CHECK: ptrtoint i32 addrspace(1)* %a to i64

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertPtrToU_widening.spvasm‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,12 @@
1-
; REQUIRES: regkeys, spirv-as, dg2-supported
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-16-plus
2+
23
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
4+
5+
; LLVM with opaque pointers:
6+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'EnableOpaquePointersBackend=1,ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
7+
; LLVM with typed pointers/default pointer typing:
38
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
9+
410
OpCapability Addresses
511
OpCapability Kernel
612
OpCapability Int64
@@ -24,8 +30,4 @@
2430
OpReturn
2531
OpFunctionEnd
2632

27-
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
28-
; following is original self-check:
29-
; ptrtoint ptr addrspace(1) %a to i64
30-
31-
; CHECK: ptrtoint i32 addrspace(1)* %a to i64
33+
; CHECK: ptrtoint {{ptr|i32}} addrspace(1){{.*}} %a to i64

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertUToPtr_narrowing-typed-pointers.spvasm‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-15-or-older
2+
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
3+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
4+
OpCapability Addresses
5+
OpCapability Kernel
6+
OpCapability Int64
7+
OpMemoryModel Physical32 OpenCL
8+
OpEntryPoint Kernel %1 "testNarrowingUToPtr"
9+
OpName %a "a"
10+
OpName %entry "entry"
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%uint = OpTypeInt 32 0
12+
%uint_0 = OpConstant %uint 0
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%ulong = OpTypeInt 64 0
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%void = OpTypeVoid
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%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
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%9 = OpTypeFunction %void %ulong
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%1 = OpFunction %void None %9
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%a = OpFunctionParameter %ulong
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%entry = OpLabel
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%10 = OpConvertUToPtr %_ptr_CrossWorkgroup_uint %a
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OpStore %10 %uint_0 Aligned 4
22+
OpReturn
23+
OpFunctionEnd
24+
25+
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
26+
; following is original self-check:
27+
; inttoptr i64 %a to ptr addrspace(1)
28+
29+
; CHECK: inttoptr i64 %a to i32 addrspace(1)*

‎IGC/ocloc_tests/SPIRV-Asm/OpConvertUToPtr_narrowing.spvasm‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,12 @@
1-
; REQUIRES: regkeys, spirv-as, dg2-supported
1+
; REQUIRES: regkeys, spirv-as, dg2-supported, llvm-16-plus
2+
23
; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
4+
5+
; LLVM with opaque pointers:
6+
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'EnableOpaquePointersBackend=1,ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
7+
; LLVM with typed pointers/default pointer typing:
38
; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'ShaderDumpTranslationOnly=1'" 2>&1 | FileCheck %s
9+
410
OpCapability Addresses
511
OpCapability Kernel
612
OpCapability Int64
@@ -22,8 +28,4 @@
2228
OpReturn
2329
OpFunctionEnd
2430

25-
; Original test expects llvm15 or higher and pass -emit-opaque-pointers flag
26-
; following is original self-check:
27-
; inttoptr i64 %a to ptr addrspace(1)
28-
29-
; CHECK: inttoptr i64 %a to i32 addrspace(1)*
31+
; CHECK: inttoptr i64 %a to {{ptr|i32}} addrspace(1)

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