minor doc cleanup

minor doc edit

Author: trbauer

visa/HWConformity.cpp

@@ -9394,7 +9394,6 @@ bool HWConformity::fixSrnd(INST_LIST_ITER it, G4_BB* bb)
     // case 1. src0 cannot be imm.
     // case 2. subreg must be zero  (must be grf-aligned)
     // case 3. For HF->BF8,  both dst and src must be packed
-    // srnd: https://gfxspecs.intel.com/Predator/Home/Index/67451
     G4_DstRegRegion* dst = inst->getDst();
     uint32_t execsize = inst->getExecSize();
     bool Packed = (dst->getType() == Type_UB);

visa/VisaToG4/TranslateSendLdStLsc.cpp

@@ -83,13 +83,6 @@ static int lscBlock2dComputeDataRegs(
         return n;
     };
 
-    // this comes out of the HAS (1408569497)
-    // non-transpose
-    //   5.1.2.3 non-vnni (HAS pg. 8)
-    //   5.1.1.2 vnni (pg.13) perversely, this comes after 5.1.2.3 in the doc
-    // transpose
-    //   5.1.3.2 non-vnni (HAS pg. 10)
-    //   5.1.2.2 vnni (HAS pg. 15)
     bool transpose = dataShape2d.order == LSC_DATA_ORDER_TRANSPOSE;
     int grfRowPitchElems =
         roundUpToPowerOf2(!transpose ? dataShape2d.width : dataShape2d.height);
@@ -102,7 +95,6 @@ static int lscBlock2dComputeDataRegs(
     //
     int dataRegs = dataShape2d.blocks*regsPerBlock;
     // C.f. DP_LOAD_2DBLOCK_ARRAY
-    //   https://gfxspecs.intel.com/Predator/Home/Index/53680
     //
     //   Data payload size, in registers. Destination length of 32 is
     //   encoded as 31.  Data port hardware derives the correct destination
@@ -202,7 +194,6 @@ int IR_Builder::translateLscUntypedInst(
     desc |= opInfo.encoding; // Desc[5:0]
 
     // build the descriptor (Sect. 3.3.1 of the HAS)
-    // (also https://gfxspecs.intel.com/Predator/Home/Index/53522)
     //
     //   Desc[5:0] = OPCODE {LOAD,STORE,LOAD_BLOCK,STORE_BLOCK,...}
     //   Desc[8:7] = addr size
@@ -1039,7 +1030,6 @@ G4_SrcRegRegion *IR_Builder::lscBuildBlock2DPayload(
     // Similar to lscBuildStridedPayload, but this formats the payload
     // as follows.
     //
-    // https://gfxspecs.intel.com/Predator/Home/Index/53567
     // A2DBLOCK_PAYLOAD:
     //   [31:0]:    base address lo (32b)
     //   [63:32]:   base address hi (32b)

visa/iga/IGALibrary/Backend/Messages/MessageDecoderHDC.cpp

@@ -17,10 +17,6 @@ static const char *MDC_DS_MEANINGS[] {
     "DE8 (8 data elements per address)",
 };
 
-
-// https://gfxspecs.intel.com/Predator/Home/Index/44782
-// https://gfxspecs.intel.com/Predator/Home/Index/44783
-// https://gfxspecs.intel.com/Predator/Home/Index/44785
 using HDCOpcode = uint32_t;
 enum DC0 : uint32_t {
     /////////////////////////////////////////
@@ -836,7 +832,6 @@ struct MessageDecoderHDC : MessageDecoderLegacy {
 
 
 // Enum of all DCRO ops
-// https://gfxspecs.intel.com/Predator/Home/Index/44785
 enum DCRO_MT {
     MT_CC_OWB  = 0x00,
     MT_CC_OWAB = 0x01,
@@ -1028,7 +1023,6 @@ void MessageDecoderHDC::tryDecodeDCRO() {
     }
 }
 
-// XE: DC0 https://gfxspecs.intel.com/Predator/Home/Index/44782
 void MessageDecoderHDC::tryDecodeDC0()
 {
     const int msgType = getDescBits(14, 5);