Drop preprocessor checks for unsupported LLVM versions (#23491)

 Drop preprocessor checks for unsupported LLVM versions


Delete all #if LLVM_VERSION_MAJOR checks which were about LLVM versions older than 14.

Author: igcbot

IGC/AdaptorCommon/FastMathConstantHandling.cpp

@@ -75,7 +75,7 @@ void FastMathConstantHandling::visitInstruction(Instruction &I) {
       I.setHasNoSignedZeros(false);
   }
 }
-#if LLVM_VERSION_MAJOR >= 10
+
 void FastMathConstantHandling::visitFNeg(Instruction &I) {
   auto *fp_val = dyn_cast<llvm::ConstantFP>(I.getOperand(0));
   if (fp_val && fp_val->getValueAPF().isZero()) {
@@ -85,7 +85,6 @@ void FastMathConstantHandling::visitFNeg(Instruction &I) {
     }
   }
 }
-#endif
 
 void FastMathConstantHandling::visitFDiv(Instruction &I) {
   if (auto *fp_val = dyn_cast<llvm::ConstantFP>(I.getOperand(1)); fp_val && fp_val->getValueAPF().isZero()) {

IGC/AdaptorOCL/OCL/sp/spp_g8.cpp

@@ -388,10 +388,10 @@ bool CGen8OpenCLProgram::GetZEBinary(llvm::raw_pwrite_stream &programBinary, uns
           }
         } else {
           linkErr.str(); // Flush contents to the associated string
-#if LLVM_VERSION_MAJOR >= 10
+
           linkOut.str(); // Flush contents to the associated string
           linkErrStr.append(linkOutStr);
-#endif // LLVM_VERSION_MAJOR
+
           if (!linkErrStr.empty()) {
             if (ctx) {
               ctx->EmitError(linkErrStr.c_str(), nullptr);

IGC/Compiler/CISACodeGen/GenIRLowering.cpp

@@ -19,15 +19,10 @@ SPDX-License-Identifier: MIT
 #include <llvm/IR/IRBuilder.h>
 #include <llvm/IR/PatternMatch.h>
 #include <llvm/Analysis/ScalarEvolution.h>
-#if LLVM_VERSION_MAJOR < 11
-#include <llvm/Analysis/ScalarEvolutionExpander.h>
-#endif
 #include <llvm/Analysis/ScalarEvolutionExpressions.h>
 #include <llvm/Analysis/TargetFolder.h>
 #include <llvm/IR/GetElementPtrTypeIterator.h>
-#if LLVM_VERSION_MAJOR >= 11
 #include <llvm/Transforms/Utils/ScalarEvolutionExpander.h>
-#endif
 #include <llvm/Transforms/Utils/Local.h>
 #include "llvmWrapper/IR/Intrinsics.h"
 #include "llvmWrapper/IR/DerivedTypes.h"

IGC/Compiler/CISACodeGen/PatternMatchPass.cpp

@@ -1293,11 +1293,9 @@ void CodeGenPatternMatch::visitUnaryInstruction(llvm::UnaryInstruction &I) {
   case Instruction::Load:
     match = MatchSingleInstruction(I);
     break;
-#if LLVM_VERSION_MAJOR >= 10
   case Instruction::FNeg:
     match = MatchAbsNeg(I);
     break;
-#endif
   }
   IGC_ASSERT(match);
 }
@@ -1322,9 +1320,7 @@ void CodeGenPatternMatch::visitIntrinsicInst(llvm::IntrinsicInst &I) {
   case Intrinsic::exp2:
     match = MatchPow(I) || MatchModifier(I);
     break;
-#if LLVM_VERSION_MAJOR >= 12
   case Intrinsic::abs:
-#endif
   case Intrinsic::fabs:
     match = MatchAbsNeg(I);
     break;
@@ -5256,13 +5252,11 @@ bool isAbs(llvm::Value *abs, e_modifier &mod, llvm::Value *&source) {
       mod = EMOD_ABS;
       return true;
     }
-#if LLVM_VERSION_MAJOR >= 12
     if (intrinsicInst->getIntrinsicID() == Intrinsic::abs) {
       source = intrinsicInst->getOperand(0);
       mod = EMOD_ABS;
       return true;
     }
-#endif
   }
 
   llvm::SelectInst *select = llvm::dyn_cast<llvm::SelectInst>(abs);
@@ -5363,13 +5357,11 @@ bool IsNegate(llvm::Instruction *inst, llvm::Value *&negateSource) {
       return true;
     }
   }
-#if LLVM_VERSION_MAJOR >= 10
   UnaryOperator *unop = dyn_cast<UnaryOperator>(inst);
   if (unop && inst->getOpcode() == Instruction::FNeg) {
     negateSource = inst->getOperand(0);
     return true;
   }
-#endif
   return false;
 }
 

IGC/Compiler/CISACodeGen/PromoteInt8Type.cpp

@@ -619,12 +619,10 @@ void PromoteInt8Type::promoteInstructions() {
           newVal = m_builder->CreateInsertElement(getSI16Value(v0), getSI16Value(v1), getUI16Value(v2), "b2s");
           break;
         }
-#if LLVM_VERSION_MAJOR >= 10
         case Instruction::Freeze: {
           newVal = m_builder->CreateFreeze(getSI16Value(v0), "b2s");
           break;
         }
-#endif
         default:
           IGC_ASSERT_MESSAGE(0, "Unexpected inst of i8");
         } // Switch

IGC/Compiler/CISACodeGen/ScalarizerCodeGen.cpp

@@ -143,7 +143,6 @@ void ScalarizerCodeGen::visitCastInst(llvm::CastInst &I) {
   }
 }
 
-#if LLVM_VERSION_MAJOR >= 10
 void ScalarizerCodeGen::visitFNeg(llvm::UnaryOperator &I) {
   if (I.getType()->isVectorTy()) {
     IGCLLVM::FixedVectorType *InstType = cast<IGCLLVM::FixedVectorType>(I.getType());
@@ -164,4 +163,3 @@ void ScalarizerCodeGen::visitFNeg(llvm::UnaryOperator &I) {
     I.eraseFromParent();
   }
 }
-#endif

IGC/Compiler/CISACodeGen/ScalarizerCodeGen.hpp

@@ -26,9 +26,7 @@ class ScalarizerCodeGen : public llvm::FunctionPass, public llvm::InstVisitor<Sc
   virtual bool runOnFunction(llvm::Function &F);
   void visitBinaryOperator(llvm::BinaryOperator &I);
   void visitCastInst(llvm::CastInst &I);
-#if LLVM_VERSION_MAJOR >= 10
   void visitFNeg(llvm::UnaryOperator &I);
-#endif
 
 private:
   llvm::IRBuilder<> *m_builder = nullptr;

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

@@ -658,18 +658,6 @@ void AddLegalizationPasses(CodeGenContext &ctx, IGCPassManager &mpm, PSSignature
   if (!isOptDisabled && ctx.m_instrTypes.hasLoadStore && IGC_IS_FLAG_DISABLED(DisableMemOpt) &&
       !ctx.getModuleMetaData()->disableMemOptforNegativeOffsetLoads) {
 
-#if LLVM_VERSION_MAJOR <= 10
-    if (ctx.type == ShaderType::OPENCL_SHADER) {
-      // Some LLVM passes may produce load/store instructions without alignment set,
-      // for example SROA. LLVM API has been changed to ensure that alignment is never
-      // missing, it has been changed in LLVM11: https://reviews.llvm.org/D77454.
-      // Merging loads/stores without alignment set results in producing loads/stores
-      // that operate on a bigger types, hence loosing an information about actual alignment.
-      // AlignmentAnalysis restores alignments based on data-flow analysis, so that MemOpt
-      // can propagate the correct alignment to the merged instructions.
-      mpm.add(new AlignmentAnalysis());
-    }
-#endif
 
     if ((ctx.type == ShaderType::RAYTRACING_SHADER || ctx.hasSyncRTCalls()) &&
         IGC_IS_FLAG_DISABLED(DisablePrepareLoadsStores)) {
@@ -736,20 +724,9 @@ void AddLegalizationPasses(CodeGenContext &ctx, IGCPassManager &mpm, PSSignature
 
     const bool allowIPConstProp = !ctx.m_hasStackCalls && IGC_IS_FLAG_DISABLED(DisableIPConstantPropagation);
 
-#if LLVM_VERSION_MAJOR >= 12
     if (allowIPConstProp) {
       mpm.add(createIPSCCPPass());
     }
-    // Note / todo: LLVM < 12 also runs simple constant propagation pass regardless
-    // of IPSCCP in this case.
-    // This pass is not available on >= 12 version, but maybe SCCP pass would
-    // be suitable here.
-#else
-    if (allowIPConstProp) {
-      mpm.add(createIPConstantPropagationPass());
-    }
-    mpm.add(createConstantPropagationPass());
-#endif
 
     mpm.add(createDeadCodeEliminationPass());
     mpm.add(createCFGSimplificationPass());
@@ -1189,19 +1166,12 @@ void OptimizeIR(CodeGenContext *const pContext) {
       // Don't run IPConstantProp if there are stackcalls
       const bool allowIPConstProp = !pContext->m_hasStackCalls && IGC_IS_FLAG_DISABLED(DisableIPConstantPropagation);
 
-#if LLVM_VERSION_MAJOR >= 12
       if (allowIPConstProp) {
         mpm.add(createIPSCCPPass());
       }
       // Note / todo: LLVM < 12 also runs simple constant propagation pass
       // regardless of IPSCCP in this case. This pass is not available on
       // >= 12 version, but maybe SCCP pass would be suitable here.
-#else
-      mpm.add(createConstantPropagationPass());
-      if (allowIPConstProp) {
-        mpm.add(createIPConstantPropagationPass());
-      }
-#endif
     }
     if (IGC_IS_FLAG_ENABLED(MSAA16BitPayloadEnable) && pContext->platform.support16bitMSAAPayload()) {
       mpm.add(new ConvertMSAAPayloadTo16Bit());
@@ -1224,11 +1194,7 @@ void OptimizeIR(CodeGenContext *const pContext) {
       mpm.add(new HoistCongruentPHI());
       mpm.add(new CodeSinking());
     }
-#if LLVM_VERSION_MAJOR >= 12
     mpm.add(llvm::createCFGSimplificationPass(SimplifyCFGOptions().hoistCommonInsts(true)));
-#else
-    mpm.add(llvm::createCFGSimplificationPass());
-#endif
 
     mpm.add(llvm::createBasicAAWrapperPass());
     mpm.add(createAddressSpaceAAWrapperPass());
@@ -1461,7 +1427,6 @@ void OptimizeIR(CodeGenContext *const pContext) {
 
       mpm.add(new BreakConstantExpr());
       mpm.add(new IGCConstProp(IGC_IS_FLAG_ENABLED(EnableSimplifyGEP)));
-#if LLVM_VERSION_MAJOR >= 14
       // Now that constant propagation is largely complete, perform
       // initial evaluation of freeze instructions. We need this to make
       // life easier for subsequent LLVM passes, as passes like
@@ -1471,7 +1436,6 @@ void OptimizeIR(CodeGenContext *const pContext) {
       // TODO: Check if LLVM 15+ provides improvements in that regard,
       // alleviating the need for early freeze evaluation.
       mpm.add(createEvaluateFreezePass());
-#endif // LLVM_VERSION_MAJOR
 
       if (IGC_IS_FLAG_DISABLED(DisableImmConstantOpt)) {
         // If we have ICBs, need to emit clamp code so OOB access doesn't occur
@@ -1506,7 +1470,7 @@ void OptimizeIR(CodeGenContext *const pContext) {
         // We need to increase default duplication threshold since JumpThreading pass cost estimation does
         // not consider that not all instructions need to be duplicated.
         int BBDuplicateThreshold = (pContext->type == ShaderType::OPENCL_SHADER) ? 9 : -1;
-#if LLVM_VERSION_MAJOR >= 15 || LLVM_VERSION_MAJOR < 12
+#if LLVM_VERSION_MAJOR >= 15
         // In LLVM-12.x an extra parameter InsertFreezeWhenUnfoldingSelect = false was added
         // to JumpThreading pass, but since LLVM-15.x it was removed again.
         mpm.add(llvm::createJumpThreadingPass(BBDuplicateThreshold));

IGC/Compiler/CISACodeGen/WIAnalysis.cpp

@@ -737,12 +737,10 @@ void WIAnalysisRunner::calculate_dep(const Value *val) {
       dep = calculate_dep(LI);
     else if (const VAArgInst *VAI = dyn_cast<VAArgInst>(inst))
       dep = calculate_dep(VAI);
-#if LLVM_VERSION_MAJOR >= 10
     else if (inst->getOpcode() == Instruction::FNeg)
       dep = calculate_dep_simple(inst);
     else if (inst->getOpcode() == Instruction::Freeze)
       dep = calculate_dep_simple(inst);
-#endif
 
     if (m_func->hasFnAttribute("KMPLOCK")) {
       dep = WIAnalysis::UNIFORM_THREAD;

IGC/Compiler/CISACodeGen/opCode.h

@@ -171,13 +171,11 @@ DECLARE_OPCODE(Alloca, Instruction, llvm_alloca, false, false, false, false, fal
 DECLARE_OPCODE(FPExt, Instruction, llvm_fpext, true, false, false, false, false, false, false)
 DECLARE_OPCODE(GenISA_f32tof16_rtz, GenISAIntrinsic, llvm_f32tof16_rtz, true, false, false, false, true, false, false)
 DECLARE_OPCODE(fabs, Intrinsic, llvm_fabs, false, false, true, false, true, false, false)
-#if LLVM_VERSION_MAJOR >= 12
 DECLARE_OPCODE(abs, Intrinsic, llvm_abs, false, false, true, false, true, false, false)
 DECLARE_OPCODE(smin, Intrinsic, llvm_smin, false, false, true, false, true, false, false)
 DECLARE_OPCODE(smax, Intrinsic, llvm_smax, false, false, true, false, true, false, false)
 DECLARE_OPCODE(umin, Intrinsic, llvm_umin, false, false, true, false, true, false, false)
 DECLARE_OPCODE(umax, Intrinsic, llvm_umax, false, false, true, false, true, false, false)
-#endif
 DECLARE_OPCODE(GenISA_fsat, GenISAIntrinsic, llvm_fsat, true, false, true, true, true, false, false)
 DECLARE_OPCODE(canonicalize, Intrinsic, llvm_canonicalize, true, true, true, true, false, false, false)
 DECLARE_OPCODE(GenISA_dp4a_ss, GenISAIntrinsic, llvm_dp4a_ss, false, true, true, true, false, false, false)