enable ShortImplicitPayloadHeader on Xe1 HPG, Xe2

Compute workloads add following implicit arguments:
 1. payloadHeader - 8 x i32 packing global_id_offset (3 x i32),
    local_size (3 x i32) and 2 x i32 reserved.
 2. enqueued_local_size - 3 x i32

local_size is never used in favour of enqueued_local_size. In the end,
payloadHeader has unused 20 bytes.

This commit enables short payload header on Xe1 HPG platforms.

Author: pkwasnie-intel

IGC/Compiler/CISACodeGen/Platform.hpp

@@ -1908,7 +1908,10 @@ bool allowShortImplicitPayloadHeader() const
     if (!supportsZEBin())
         return false;
 
-    return false;
+    if (m_platformInfo.eProductFamily == IGFX_PVC)
+        return false;
+
+    return isCoreChildOf(IGFX_XE_HP_CORE) && !isCoreChildOf(IGFX_XE3_CORE);
 }
 
 bool allowRemovingUnusedImplicitArguments() const