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houjenkosys_zuul
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[IGC feature][staged compilation] Add fastest stage 1 to emit SIMD8 w/o opts
Change-Id: I64d5a3b7af5f4c13441eb6994961f3b9535d787e
1 parent 836d326 commit 6207646

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5 files changed

+19
-4
lines changed

5 files changed

+19
-4
lines changed

IGC/AdaptorCommon/API/igc.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,12 +108,14 @@ typedef enum {
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FLAG_CG_ALL_SIMDS = 0,
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FLAG_CG_STAGE1_FAST_COMPILE = 1,
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FLAG_CG_STAGE1_BEST_PERF = 2,
111+
FLAG_CG_STAGE1_FASTEST_COMPILE = 3,
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} CG_FLAG_t;
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#define IsStage2Available(ctx_ptr) (ctx_ptr != nullptr)
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#define IsStage2RestSIMDs(prev_ctx_ptr) (prev_ctx_ptr != nullptr)
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#define IsStage1FastCompile(flag, prev_ctx_ptr) (!IsStage2RestSIMDs(prev_ctx_ptr) && flag == FLAG_CG_STAGE1_FAST_COMPILE)
118+
#define IsStage1FastestCompile(flag, prev_ctx_ptr) (!IsStage2RestSIMDs(prev_ctx_ptr) && flag == FLAG_CG_STAGE1_FASTEST_COMPILE)
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#define IsStage1BestPerf(flag, prev_ctx_ptr) (!IsStage2RestSIMDs(prev_ctx_ptr) && flag == FLAG_CG_STAGE1_BEST_PERF)
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#define IsAllSIMDs(flag, prev_ctx_ptr) (!IsStage2RestSIMDs(prev_ctx_ptr) && flag == FLAG_CG_ALL_SIMDS)
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#define IsStage1(pCtx) (IsStage1BestPerf(pCtx->m_CgFlag, pCtx->m_StagingCtx) || \

IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4383,6 +4383,14 @@ namespace IGC
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// Set to stitch all functions to all kernels in a VISABuidler
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SaveOption(vISA_noStitchExternFunc, false);
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// Turning off optimizations as much as possible to have the fastest compilation
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if (IsStage1FastestCompile(context->m_CgFlag, context->m_StagingCtx))
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{
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SaveOption(vISA_FastSpill, true);
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SaveOption(vISA_LocalScheduling, false);
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SaveOption(vISA_preRA_Schedule, false);
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}
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}
43874395

43884396
void CEncoder::InitEncoder(bool canAbortOnSpill, bool hasStackCall)

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -844,7 +844,8 @@ static void PSCodeGen(
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AddCodeGenPasses(*ctx, shaders, PassMgr, SIMDMode::SIMD8, !ctx->m_retryManager.IsLastTry(), ShaderDispatchMode::NOT_APPLICABLE, pSignature);
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useRegKeySimd = true;
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}
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else if (IsStage1FastCompile(ctx->m_CgFlag, ctx->m_StagingCtx))
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else if (IsStage1FastCompile(ctx->m_CgFlag, ctx->m_StagingCtx) ||
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IsStage1FastestCompile(ctx->m_CgFlag, ctx->m_StagingCtx))
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{
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AddCodeGenPasses(*ctx, shaders, PassMgr, SIMDMode::SIMD8, false, ShaderDispatchMode::NOT_APPLICABLE, pSignature);
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useRegKeySimd = true;

IGC/common/debug/Dump.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -330,11 +330,15 @@ std::string DumpName::AbsolutePath(OutputFolderName folder) const
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{
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ss << "FastStage1";
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}
333-
else
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else if (m_cgFlag.getValue() == FLAG_CG_STAGE1_BEST_PERF)
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{
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IGC_ASSERT(m_cgFlag.getValue() == FLAG_CG_STAGE1_BEST_PERF);
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ss << "BestStage1";
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}
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else
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{
339+
IGC_ASSERT(m_cgFlag.getValue() == FLAG_CG_STAGE1_FASTEST_COMPILE);
340+
ss << "FastestStage1";
341+
}
338342

339343
underscore = true;
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}

IGC/common/igc_flags.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -381,7 +381,7 @@ DECLARE_IGC_REGKEY(bool, StagedCompilation, false, "Enable staged co
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DECLARE_IGC_REGKEY(bool, EnableTrackPtr, false, "Track Staging Context alloc/dealloc", false)
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DECLARE_IGC_REGKEY(bool, ExtraRetrySIMD16, false, "Enable extra simd16 with retry for STAGE1_BEST_PREF", false)
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DECLARE_IGC_REGKEY(bool, SaveRestoreIR, true, "Save/Restore IR for staged compilation to avoid duplicated compilations", false)
384-
DECLARE_IGC_REGKEY(bool, StagedBestSIMD, false, "Force Pixel shader to return the best SIMD, either SIMD16 or SIMD8. When StagedCompilation is on, this only affects to the first stage", false)
384+
DECLARE_IGC_REGKEY(DWORD, FirstStagedSIMD, 1, "Force Pixel shader to be 1: BestSIMD (SIMD16 or SIMD8), 2: FastSIMD (SIMD8), 3: FatestSIMD (SIMD8 opt off)", false)
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DECLARE_IGC_REGKEY(bool, ForceBestSIMD, false, "Force pixel shader to return the best SIMD, either SIMD16 or SIMD8.", false)
386386
DECLARE_IGC_REGKEY(bool, SkipTREarlyExitCheck, false, "Skip SIMD16 early exit check in ShaderCodeGen", false)
387387
DECLARE_IGC_REGKEY(bool, EnableTCSHWBarriers, false, "Enable TCS pass with HW barriers support. Default TCS pass is TCS pass with multiple continuation functions.", false)

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