@@ -1782,6 +1782,45 @@ void Interference::addCalleeSaveBias(const BitSet& live)
17821782 }
17831783}
17841784
1785+ void Interference::buildInterferenceAmongLiveOuts ()
1786+ {
1787+ // Mark interference between dcls marked as Output.
1788+ //
1789+ // Interference computation marks interference for a
1790+ // variable only when definition for that variable is
1791+ // seen, not otherwise.
1792+ //
1793+ // This method is useful when definition of such
1794+ // "Output" variables are emitted to program post RA.
1795+ //
1796+ // It is safe to mark interference between all "Output"
1797+ // dcls even when their definition is present in the program.
1798+
1799+ // First gather all Output dcls in a vector to avoid an O(N^2)
1800+ // lookup. Number of OutputDcls should be small.
1801+ std::vector<G4_Declare*> OutputDcls;
1802+ for (auto dcl : kernel.Declares )
1803+ {
1804+ if (!dcl->getRegVar ()->isRegAllocPartaker () ||
1805+ !dcl->isOutput ())
1806+ continue ;
1807+
1808+ OutputDcls.push_back (dcl);
1809+ }
1810+
1811+ for (auto dcl1 : OutputDcls)
1812+ {
1813+ // dcl1 is RA partaker iter and is marked as Output
1814+ for (auto dcl2 : OutputDcls)
1815+ {
1816+ if (dcl1 == dcl2)
1817+ continue ;
1818+
1819+ checkAndSetIntf (dcl1->getRegVar ()->getId (), dcl2->getRegVar ()->getId ());
1820+ }
1821+ }
1822+ }
1823+
17851824void Interference::buildInterferenceAmongLiveIns ()
17861825{
17871826 //
@@ -2448,6 +2487,8 @@ void Interference::computeInterference()
24482487 //
24492488 BitSet live (maxId, false );
24502489
2490+ buildInterferenceAmongLiveOuts ();
2491+
24512492 for (G4_BB *bb : kernel.fg )
24522493 {
24532494 //
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