Prevent constant folding inside loops

mshelego · igcbot · commit 6fcd40fd5ba5 · 2025-01-09T17:57:14.000+01:00
When vector constants are loaded using wrregions only (without
genx.constant intrinsics) they are immediately folded back.
Keep the ones that are inside loops so they could be moved out
by licm
diff --git a/IGC/VectorCompiler/include/GenXRegionUtils.h b/IGC/VectorCompiler/include/GenXRegionUtils.h
@@ -166,10 +166,12 @@ inline raw_ostream &operator<<(raw_ostream &OS, const RdWrRegionSequence &RWS) {
 
 Value *simplifyRegionInst(Instruction *Inst, const DataLayout *DL = nullptr,
                           const GenXSubtarget *ST = nullptr,
-                          const DominatorTree *DT = nullptr);
+                          const DominatorTree *DT = nullptr,
+                          const Loop *L = nullptr);
 bool simplifyRegionInsts(Function *F, const DataLayout *DL = nullptr,
                          const GenXSubtarget *ST = nullptr,
-                         const DominatorTree *DT = nullptr);
+                         const DominatorTree *DT = nullptr,
+                         const LoopInfo *LI = nullptr);
 
 bool IsLinearVectorConstantInts(Value *v, int64_t &start, int64_t &stride);
 
diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXPostLegalization.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXPostLegalization.cpp
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2022 Intel Corporation
+Copyright (C) 2017-2024 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -60,6 +60,7 @@ namespace {
 class GenXPostLegalization : public FunctionPass {
   const DataLayout *DL = nullptr;
   const GenXSubtarget *ST = nullptr;
+  const LoopInfo *LI = nullptr;
 public:
   static char ID;
   explicit GenXPostLegalization() : FunctionPass(ID) { }
@@ -77,6 +78,7 @@ char GenXPostLegalization::ID = 0;
 namespace llvm { void initializeGenXPostLegalizationPass(PassRegistry &); }
 INITIALIZE_PASS_BEGIN(GenXPostLegalization, "GenXPostLegalization",
                       "GenXPostLegalization", false, false)
+INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass);
 INITIALIZE_PASS_END(GenXPostLegalization, "GenXPostLegalization",
                     "GenXPostLegalization", false, false)
 
@@ -87,6 +89,8 @@ FunctionPass *llvm::createGenXPostLegalizationPass() {
 
 void GenXPostLegalization::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<TargetPassConfig>();
+  AU.addRequired<LoopInfoWrapperPass>();
+  AU.addPreserved<LoopInfoWrapperPass>();
   AU.setPreservesCFG();
 }
 
@@ -99,6 +103,7 @@ bool GenXPostLegalization::runOnFunction(Function &F)
   ST = &getAnalysis<TargetPassConfig>()
             .getTM<GenXTargetMachine>()
             .getGenXSubtarget();
+  LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
 
   VectorDecomposer VD(ST);
 
@@ -140,7 +145,7 @@ bool GenXPostLegalization::runOnFunction(Function &F)
   // Run the vector decomposer for this function.
   Modified |= VD.run(*DL);
   // Cleanup region reads and writes.
-  Modified |= simplifyRegionInsts(&F, DL, ST);
+  Modified |= simplifyRegionInsts(&F, DL, ST, nullptr, LI);
   // Cleanup constant loads.
   std::vector<CallInst *> ConstList;
   Modified |= cleanupConstantLoads(&F, ConstList);
diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXRegionUtils.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXRegionUtils.cpp
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2023 Intel Corporation
+Copyright (C) 2017-2024 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -1132,7 +1132,7 @@ static Value *simplifyRegionRead(Instruction *Inst, const DataLayout *DL) {
 // Simplify a region read or write.
 Value *llvm::genx::simplifyRegionInst(Instruction *Inst, const DataLayout *DL,
                                       const GenXSubtarget *ST,
-                                      const DominatorTree *DT) {
+                                      const DominatorTree *DT, const Loop *L) {
   if (Inst->use_empty())
     return nullptr;
 
@@ -1161,7 +1161,11 @@ Value *llvm::genx::simplifyRegionInst(Instruction *Inst, const DataLayout *DL,
   }
 
   if (Constant *C = ConstantFoldGenX(Inst, *DL))
-    return C;
+    // The instruction can be folded to a constant, so other simplifications are
+    // not relevant. If the instruction is inside a loop it shouldn't be
+    // substituted with a constant here so it could be moved out from the loop
+    // later.
+    return L ? nullptr : C;
 
   if (auto *BCI = dyn_cast<BitCastInst>(Inst); BCI && DL && ST) {
     NewVal = simplifyBitCastFromRegionRead(BCI, *DL, *ST);
@@ -1194,12 +1198,14 @@ Value *llvm::genx::simplifyRegionInst(Instruction *Inst, const DataLayout *DL,
 
 bool llvm::genx::simplifyRegionInsts(Function *F, const DataLayout *DL,
                                      const GenXSubtarget *ST,
-                                     const DominatorTree *DT) {
+                                     const DominatorTree *DT,
+                                     const LoopInfo *LI) {
   bool Changed = false;
   for (auto &BB : *F) {
+    auto *L = LI->getLoopFor(&BB);
     for (auto I = BB.begin(); I != BB.end();) {
       Instruction *Inst = &*I++;
-      if (auto V = simplifyRegionInst(Inst, DL, ST, DT)) {
+      if (auto V = simplifyRegionInst(Inst, DL, ST, DT, L)) {
         if (isa<Instruction>(V) &&
             !genx::isSafeToReplace_CheckAVLoadKillOrForbiddenUser(
                 Inst, cast<Instruction>(V), DT))
diff --git a/IGC/VectorCompiler/test/PostLegalization/constant_loop.ll b/IGC/VectorCompiler/test/PostLegalization/constant_loop.ll
@@ -0,0 +1,35 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2024 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+
+; RUN: %opt %use_old_pass_manager% -GenXPostLegalization -licm -march=genx64 -mcpu=XeHPC -mtriple=spir64 -S < %s | FileCheck %s
+
+define void @test(i64 %arg) {
+entry:
+; CHECK-LABEL: entry
+; CHECK-NEXT: [[ZEROES_0:%[^ ]+]] = call <64 x i64> @llvm.genx.wrregioni.v64i64.v16i64.i16.i1(<64 x i64> undef, <16 x i64> zeroinitializer, i32 16, i32 16, i32 1, i16 0, i32 undef, i1 true)
+; CHECK-NEXT: [[ZEROES_16:%[^ ]+]] = call <64 x i64> @llvm.genx.wrregioni.v64i64.v16i64.i16.i1(<64 x i64> [[ZEROES_0]], <16 x i64> zeroinitializer, i32 16, i32 16, i32 1, i16 128, i32 undef, i1 true)
+; CHECK-NEXT: [[ZEROES_32:%[^ ]+]] = call <64 x i64> @llvm.genx.wrregioni.v64i64.v16i64.i16.i1(<64 x i64> [[ZEROES_16]], <16 x i64> zeroinitializer, i32 16, i32 16, i32 1, i16 256, i32 undef, i1 true)
+; CHECK-NEXT: [[ZEROES_48:%[^ ]+]] = call <64 x i64> @llvm.genx.wrregioni.v64i64.v16i64.i16.i1(<64 x i64> [[ZEROES_32]], <16 x i64> zeroinitializer, i32 16, i32 16, i32 1, i16 384, i32 undef, i1 true)
+; CHECK-NEXT: br label %loop
+   br label %loop
+
+loop:
+   %offset = phi i32 [ 0, %entry ], [ %offset.next, %loop ]
+   %offset.zext = zext i32 %offset to i64
+   %addr = add i64 %arg, %offset.zext
+; CHECK: tail call void @llvm.vc.internal.lsc.store.ugm.i1.v2i8.i64.v64i64(i1 true, i8 3, i8 4, i8 8, <2 x i8> zeroinitializer, i64 0, i64 %addr, i16 1, i32 0, <64 x i64> [[ZEROES_48]])
+   tail call void @llvm.vc.internal.lsc.store.ugm.i1.v2i8.i64.v64i64(i1 true, i8 3, i8 4, i8 8, <2 x i8> zeroinitializer, i64 0, i64 %addr, i16 1, i32 0, <64 x i64> zeroinitializer)
+   %offset.next = add nuw nsw i32 %offset, 512
+   %cmp = icmp ult i32 %offset.next, 32256
+   br i1 %cmp, label %loop, label %end
+
+ end:
+   ret void
+ }
+
+declare void @llvm.vc.internal.lsc.store.ugm.i1.v2i8.i64.v64i64(i1, i8, i8, i8, <2 x i8>, i64, i64, i16, i32, <64 x i64>)
