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aparshin-inteligcbot
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code cosmetics
1 parent 7342c46 commit 794f003

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3 files changed

+71
-5
lines changed

3 files changed

+71
-5
lines changed

IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp

Lines changed: 44 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -940,13 +940,14 @@ static bool isExtOperandBaled(Use &U, const GenXBaling *Baling) {
940940

941941
void addKernelAttrsFromMetadata(VISAKernel &Kernel, const KernelMetadata &KM,
942942
const GenXSubtarget* Subtarget) {
943+
IGC_ASSERT(Subtarget);
943944
unsigned Val = KM.getSLMSize();
944945
if (Val) {
945946
// Compute the slm size in KB and roundup to power of 2.
946947
Val = alignTo(Val, 1024) / 1024;
947948
if (!isPowerOf2_64(Val))
948949
Val = NextPowerOf2(Val);
949-
unsigned MaxSLMSize = 64;
950+
unsigned MaxSLMSize = Subtarget->getMaxSlmSize();
950951
if (Val > MaxSLMSize)
951952
report_fatal_error("slm size must not exceed 64KB");
952953
else {
@@ -959,6 +960,35 @@ void addKernelAttrsFromMetadata(VISAKernel &Kernel, const KernelMetadata &KM,
959960
}
960961
}
961962

963+
// Load thread payload from memory.
964+
if (Subtarget->hasThreadPayloadInMemory()) {
965+
// The number of GRFs for per thread inputs (thread local IDs)
966+
unsigned NumGRFs = 0;
967+
bool HasImplicit = false;
968+
for (auto Kind : KM.getArgKinds()) {
969+
if (Kind & 0x8)
970+
HasImplicit = true;
971+
genx::KernelArgInfo KAI(Kind);
972+
NumGRFs += KAI.isLocalIDX() || KAI.isLocalIDY() || KAI.isLocalIDZ();
973+
}
974+
if (Subtarget->isOCLRuntime()) {
975+
// When CM kernel is run with OCL runtime, it is dispatched in a
976+
// special "SIMD1" mode (aka "Programmable Media Kernels").
977+
// This mode implies that we always have a "full" thread payload,
978+
// even when CM kernel does *not* have implicit arguments.
979+
// Payload format:
980+
// | 0-15 | 16 - 31 | 32 - 47 | 46 - 256 |
981+
// | localIDX | localIDY | localIDZ | unused |
982+
IGC_ASSERT(NumGRFs == 0); // we do not expect local_id_[x/y/z] calls
983+
NumGRFs = 1;
984+
} else {
985+
// One GRF for per thread input size for CM
986+
NumGRFs = std::max(HasImplicit ? 1U : 0U, NumGRFs);
987+
}
988+
989+
uint16_t Bytes = NumGRFs * Subtarget->getGRFWidth();
990+
Kernel.AddKernelAttribute("PerThreadInputSize", sizeof(Bytes), &Bytes);
991+
}
962992

963993
}
964994

@@ -1124,6 +1154,19 @@ bool GenXKernelBuilder::run() {
11241154

11251155
static bool PatchImpArgOffset(Function *F, const GenXSubtarget *ST,
11261156
const KernelMetadata &KM) {
1157+
IGC_ASSERT(ST);
1158+
if (!ST->needsArgPatching())
1159+
return false;
1160+
if (F->hasFnAttribute(genx::FunctionMD::OCLRuntime))
1161+
return false;
1162+
1163+
unsigned Idx = 0;
1164+
for (auto i = F->arg_begin(), e = F->arg_end(); i != e; ++i, ++Idx) {
1165+
uint8_t Kind = (KM.getArgKind(Idx));
1166+
if (Kind & 0xf8)
1167+
return true;
1168+
}
1169+
11271170
return false;
11281171
}
11291172

IGC/VectorCompiler/lib/GenXCodeGen/GenXLegalization.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -613,7 +613,7 @@ bool GenXLegalization::processInst(Instruction *Inst) {
613613
if (!ST->emulateLongLong() && checkIfLongLongSupportNeeded(Inst))
614614
report_fatal_error("'long long' type is not supported by this target");
615615
}
616-
if (ST->isICLLP() || ST->isTGLLP()) {
616+
if (!ST->hasSad2Support()) {
617617
switch (GenXIntrinsic::getGenXIntrinsicID(Inst)) {
618618
case GenXIntrinsic::genx_ssad2:
619619
case GenXIntrinsic::genx_sssad2add:

IGC/VectorCompiler/lib/GenXCodeGen/GenXSubtarget.h

Lines changed: 26 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -175,8 +175,10 @@ class GenXSubtarget final : public GenXGenSubtargetInfo {
175175
bool isICLLP() const { return GenXVariant == GENX_ICLLP; }
176176
/// * isTGLLP - true if target is TGL LP
177177
bool isTGLLP() const { return GenXVariant == GENX_TGLLP; }
178+
178179
/// * emulateLongLong - true if i64 emulation is requested
179180
bool emulateLongLong() const { return EmulateLongLong; }
181+
180182
/// * emulateIDivRem - true if emulates integer division and reminder.
181183
bool emulateIDivRem() const { return GenXVariant >= GENX_TGLLP; }
182184

@@ -210,6 +212,30 @@ class GenXSubtarget final : public GenXGenSubtargetInfo {
210212
/// crossing one GRF boundary
211213
bool hasIndirectGRFCrossing() const { return isSKLplus(); }
212214

215+
/// * getMaxSlmSize - returns maximum allowed SLM size (in KB)
216+
unsigned getMaxSlmSize() const {
217+
return 64;
218+
}
219+
220+
bool hasThreadPayloadInMemory() const {
221+
return false;
222+
}
223+
224+
/// * hasSad2Support - returns true if sad2/sada2 are supported by target
225+
bool hasSad2Support() const {
226+
if (isICLLP() || isTGLLP())
227+
return false;
228+
return true;
229+
}
230+
231+
/// * hneedsArgPatching - some subtarget require special treatment of
232+
// certain argument types, returns *true* if this is the case.
233+
bool needsArgPatching() const {
234+
if (isOCLRuntime())
235+
return false;
236+
return false;
237+
}
238+
213239
/// * getEmulateFunction - return the corresponding emulation function name,
214240
/// empty string if no emulation is needed.
215241
StringRef getEmulateFunction(const Instruction *Inst) const;
@@ -256,9 +282,6 @@ class GenXSubtarget final : public GenXGenSubtargetInfo {
256282
return TARGET_PLATFORM::GENX_ICLLP;
257283
case GENX_TGLLP:
258284
return TARGET_PLATFORM::GENX_TGLLP;
259-
// TODO: Unfortunately, the finalizer doesn't support all platforms, so we
260-
// map any unsupported platforms to the most appropriate supported one.
261-
// See also getFinalizerPlatform function in GenX.cpp
262285
case GENX_KBL:
263286
return TARGET_PLATFORM::GENX_SKL;
264287
case GENX_GLK:

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