@@ -323,6 +323,18 @@ bool isDisContRegion (
323323 return region->getRegion ()->isContiguous (execSize);
324324}
325325
326+ // Get a GRF aligned mask
327+
328+ unsigned SpillManagerGRF::grfMask () const
329+ {
330+ unsigned mask = 0 ;
331+ mask = (mask - 1 );
332+ MUST_BE_TRUE (std::log2 (G4_GRF_REG_NBYTES) == (float )((int )(std::log2 (G4_GRF_REG_NBYTES))), " expected integral value" );
333+ unsigned int bits = (unsigned int )std::log2 (G4_GRF_REG_NBYTES);
334+ mask = mask << bits;
335+ return mask;
336+ }
337+
326338// Get an hexal word mask with the lower 5 bits zeroed.
327339
328340inline unsigned
@@ -770,9 +782,9 @@ SpillManagerGRF::calculateEncAlignedSegment (
770782
771783 if ( useScratchMsg_ )
772784 {
773- unsigned hwordLB = regionDisp & hwordMask ();
774- unsigned hwordRB = hwordLB + HWORD_BYTE_SIZE ;
775- unsigned blockSize = HWORD_BYTE_SIZE ;
785+ unsigned hwordLB = regionDisp & grfMask ();
786+ unsigned hwordRB = hwordLB + G4_GRF_REG_NBYTES ;
787+ unsigned blockSize = G4_GRF_REG_NBYTES ;
776788
777789 while (regionDisp + regionByteSize > hwordRB) {
778790 hwordRB += blockSize;
@@ -781,7 +793,7 @@ SpillManagerGRF::calculateEncAlignedSegment (
781793 assert ((hwordRB - hwordLB)/ REG_BYTE_SIZE <= 4 );
782794 start = hwordLB;
783795 end = hwordRB;
784- type = hwordMask ();
796+ type = grfMask ();
785797 }
786798 else
787799 {
@@ -1384,7 +1396,6 @@ static unsigned short getSpillRowSizeForSendSrc(
13841396 }
13851397 else
13861398 {
1387- assert (filledRegion->getLinearizedStart () % GENX_GRF_REG_SIZ == 0 );
13881399 nRows = (filledRegion->getLinearizedEnd () - filledRegion->getLinearizedStart () + 1 ) / GENX_GRF_REG_SIZ;
13891400 }
13901401
@@ -1408,7 +1419,7 @@ SpillManagerGRF::createSendFillRangeDeclare (
14081419 G4_SrcRegRegion * normalizedSendSrc =
14091420 builder_->createSrcRegRegion (
14101421 filledRegion->getModifier (), Direct, filledRegVar,
1411- filledRegion->getRegOff (), SUBREG_ORIGIN , filledRegion->getRegion (),
1422+ filledRegion->getRegOff (), filledRegion-> getSubRegOff () , filledRegion->getRegion (),
14121423 filledRegion->getType ());
14131424 unsigned short width = REG_BYTE_SIZE / filledRegion->getElemSize ();
14141425 assert (REG_BYTE_SIZE % filledRegion->getElemSize () == 0 );
0 commit comments