Set r coordinate correctly for predication of a typed atomic

All 3 coordinates u, v and r need to be set to corresponding atomic variables
when generating a destination buffer load for a typed atomic.

Author: eternastudento

IGC/Compiler/CustomSafeOptPass.cpp

@@ -7207,7 +7207,7 @@ void InsertBranchOpt::atomicSplitOpt(Function& F, int mode)
                 ld_FunctionArgList[ 0 ] = inst->getOperand( 0 );
                 ld_FunctionArgList[ 1 ] = inst->getOperand( 1 );
                 ld_FunctionArgList[ 2 ] = inst->getOperand( 2 );
-                ld_FunctionArgList[ 3 ] = zero;
+                ld_FunctionArgList[ 3 ] = inst->getOperand( 3 );
                 ld_FunctionArgList[ 4 ] = zero;
                 NewInst = builder.CreateCall( pLdIntrinsic, ld_FunctionArgList );
             }

IGC/Compiler/tests/InsertBranchOpt/atomic-split-typed-pointers.ll

@@ -21,7 +21,7 @@ define void @test_atomic_split(i32* %src1) {
 ; CHECK:    [[TMP3:%.*]] = call i32 @llvm.genx.GenISA.intatomictyped.i32.p0i32(i32* [[SRC1]], i32 1, i32 2, i32 3, i32 [[TMP1]], i32 1)
 ; CHECK:    br label %[[ATOMIC_IF_END:.*]]
 ; CHECK:  [[ATOMIC_IF_FALSE]]:
-; CHECK:    [[TMP4:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p0i32(i32* [[SRC1]], i32 1, i32 2, i32 0, i32 0)
+; CHECK:    [[TMP4:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p0i32(i32* [[SRC1]], i32 1, i32 2, i32 3, i32 0)
 ; CHECK:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP4]], i64 0
 ; CHECK:    [[TMP6:%.*]] = bitcast float [[TMP5]] to i32
 ; CHECK:    br label %[[ATOMIC_IF_END]]

IGC/Compiler/tests/InsertBranchOpt/atomic-split.ll

@@ -21,7 +21,7 @@ define void @test_atomic_split(ptr %src1) {
 ; CHECK:    [[TMP3:%.*]] = call i32 @llvm.genx.GenISA.intatomictyped.i32.p0(ptr [[SRC1]], i32 1, i32 2, i32 3, i32 [[TMP1]], i32 1)
 ; CHECK:    br label %[[ATOMIC_IF_END:.*]]
 ; CHECK:  [[ATOMIC_IF_FALSE]]:
-; CHECK:    [[TMP4:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p0(ptr [[SRC1]], i32 1, i32 2, i32 0, i32 0)
+; CHECK:    [[TMP4:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p0(ptr [[SRC1]], i32 1, i32 2, i32 3, i32 0)
 ; CHECK:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP4]], i64 0
 ; CHECK:    [[TMP6:%.*]] = bitcast float [[TMP5]] to i32
 ; CHECK:    br label %[[ATOMIC_IF_END]]

IGC/Compiler/tests/InsertBranchOpt/atomic_branch_mode1-typed-pointers.ll

@@ -50,7 +50,7 @@ define i32 @atomicIadd0Typed(i32 %mem, i32 %val) {
 ; CHECK-NEXT:    [[ATOMIC:%.*]] = call i32 @llvm.genx.GenISA.intatomictyped.i32.p131073v4f32(<4 x float> addrspace(131073)* null, i32 [[U]], i32 [[LOCALID_Z]], i32 [[ADDBEFORE]], i32 [[SOMEUNKNOWN]], i32 0)
 ; CHECK-NEXT:    br label [[ATOMIC_IF_END:%.*]]
 ; CHECK:       atomic.if.false:
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p131073v4f32(<4 x float> addrspace(131073)* null, i32 [[U]], i32 [[LOCALID_Z]], i32 0, i32 0)
+; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p131073v4f32(<4 x float> addrspace(131073)* null, i32 [[U]], i32 [[LOCALID_Z]], i32 [[ADDBEFORE]], i32 0)
 ; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0
 ; CHECK-NEXT:    [[TMP5:%.*]] = bitcast float [[TMP4]] to i32
 ; CHECK-NEXT:    br label [[ATOMIC_IF_END]]

IGC/Compiler/tests/InsertBranchOpt/atomic_branch_mode1.ll

@@ -50,7 +50,7 @@ define i32 @atomicIadd0Typed(i32 %mem, i32 %val) {
 ; CHECK-NEXT:    [[ATOMIC:%.*]] = call i32 @llvm.genx.GenISA.intatomictyped.i32.p131073(ptr addrspace(131073) null, i32 [[U]], i32 [[LOCALID_Z]], i32 [[ADDBEFORE]], i32 [[SOMEUNKNOWN]], i32 0)
 ; CHECK-NEXT:    br label [[ATOMIC_IF_END:%.*]]
 ; CHECK:       atomic.if.false:
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p131073(ptr addrspace(131073) null, i32 [[U]], i32 [[LOCALID_Z]], i32 0, i32 0)
+; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.genx.GenISA.typedread.p131073(ptr addrspace(131073) null, i32 [[U]], i32 [[LOCALID_Z]], i32 [[ADDBEFORE]], i32 0)
 ; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0
 ; CHECK-NEXT:    [[TMP5:%.*]] = bitcast float [[TMP4]] to i32
 ; CHECK-NEXT:    br label [[ATOMIC_IF_END]]